First of all: The TRS-80 was not the only computer with this problem, but there were many computers with this problem.
The effect you describe is sometimes called "CGA snow" because before the introduction of EGA cards (CGA cards were used in IBM PCs) IBM PCs were showing this effect.
... it would make the machine slightly slower ...
Depending on how much you write to the screen memory, the machine would have been massively slower.
Okay, the display and CPU cannot access video memory at the same time.
...
Why did they instead give the CPU priority?
To understand that question, we have to keep in mind that "CGA snow" does not happen because display and CPU cannot access the RAM the same time, but because they do access the RAM the same time!.
A circuit that stops the CPU or the display would have been rather complicated and expensive - so the circuit is designed in a way that both the CPU and the display access the RAM at the same time.
Yes, they do access the RAM at the same time.
The question remaining is: Which of both devices (CPU or display) has priority over the RAM address lines in this case?
If the CPU has priority (this is the case in the TRS-80 and in CGA cards), a pixel that should be shown at coordinate (x1,y1) is shown at coordinate (x2,y2). If the pixels at (x1,y1) and (x2,y2) have a different color (or, in text-only modes like the TRS-80: a different ASCII character), you will see some flickering.
If the display has priority, the data will be written to the wrong addresses in the display memory so the entire display content will be wrong forever!
=> If both CPU and display access the RAM the same time, the CPU must have priority.
I just looked at the schematics:
Using an additional 74LS125 it would have been possible to read back the HSYNC signal via software and implement your idea in software.
However, I doubt that there was still space in the 4K ROM (Level I) left...