Timeline for IDE interface board design review [closed]
Current License: CC BY-SA 4.0
11 events
when toggle format | what | by | license | comment | |
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May 3, 2023 at 16:17 | comment | added | user3840170 | Would the close voters mind explaining what details are missing here? | |
May 2, 2023 at 16:36 | comment | added | eesz34 | I will be putting a scope on the various TTL outputs with a pull-up to check rise-time. I was wondering this myself as some sources suggest 1K, but am hazarding a guess that this is too weak. EDIT: I've never studied logic families so much. HCT is I believe what I want. I think that'll take care of the '244 and '245s. I'll have deal with the GAL separately. | |
May 2, 2023 at 13:15 | comment | added | camelccc | OK, if you don't have pullup resistors, the value will need to be chosen to allow for the capacitance of the cmos input to get the required rise time, as ttl can not source current at all, only sink it. This leads to surprisingly small values. I suspect (this is a guess) that the newer boards may have buffered ttl, hence your board works on some boards and not others. A ttl bufffer ic may be a better bet here. | |
May 2, 2023 at 11:11 | comment | added | eesz34 | I think you have given me a good lead here. I was subconsciously aware of the TTL-CMOS issue but didn't seriously consider it. One type of input on the SSD is rated for minimum 4V for a logic high, and I doubt this is occurring consistently. Thank you for pointing this out. | |
May 2, 2023 at 10:28 | history | closed |
Raffzahn Fred Toby Speight Mark Williams Simon Farnsworth |
Needs details or clarity | |
May 2, 2023 at 9:37 | comment | added | camelccc | Im wondering if you have hit the nail on the head Justme, mixing HC and TTL does need pullup resistors, and its not clear if the op has these | |
May 2, 2023 at 7:16 | history | edited | user3840170 |
edited tags; edited tags
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May 2, 2023 at 6:23 | comment | added | Justme | I think this is more an electronics question. You are trying to make a new modern adapter for connecting new modern and backwards incompatible CF cards with 44-pin IDE-alike interface to retro hardware. At least using HC type chips is wrong as these are TTL levels. The exact type of the GAL is missing too, it may be timing critical, but at least it should use TTL levels. | |
May 2, 2023 at 0:21 | review | Close votes | |||
May 2, 2023 at 10:28 | |||||
May 1, 2023 at 23:50 | history | edited | aybe | CC BY-SA 4.0 |
added 54 characters in body
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May 1, 2023 at 21:09 | history | asked | eesz34 | CC BY-SA 4.0 |