Timeline for Creating 8086 binary larger than 64 KiB using NASM or any other assembler
Current License: CC BY-SA 4.0
8 events
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| Jul 3, 2023 at 16:33 | comment | added | supercat | @PeterCordes: I'd forgotten that ARM doesn't have LDRS, though I guess it makes since since even LDREX doesn't set flags for some reason(!). The Motorola 6800, 68000, 6502, 8051, and PIC are among devices where a load into a general-purpose register will set flags. | |
| Jul 3, 2023 at 16:18 | comment | added | Peter Cordes |
Thanks. And yes, agreed. x86 can compare with memory, but often you want the result in a register for one side of the branch. What CPUs can load + set FLAGS? I don't think ARM can. It can movs to copy a register and set flags, but not ldrs (which makes sense for a load-store RISC-ish ISA.) MIPS/RISC-V branch on values instead of having a condition-code register, so I guess they avoid the problem of needing a separate test instruction after a load. (And so does ARM / AArch64 in cases where you can use cbz / cbnz. Like with x86 jcxz except it's only CX and not quite as fast.)
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| Jul 3, 2023 at 16:13 | comment | added | supercat | @PeterCordes: Most of my 8086 coding was in an era where the instructions were equivalent, and it's hard to teach an old dog new tricks, but I'll try to keep the TEST instruction in mind for future x86 examples. BTW, I think it's a shame more processors don't have both "load while setting flags" and "load without setting flags" instructions, since both kinds of instructions are very useful. | |
| Jul 3, 2023 at 16:05 | comment | added | Peter Cordes |
I wasn't commenting about your main point at all, just that one detail. or reg,reg is a worse idiom that a new generation of coders shouldn't learn by example.
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| Jul 3, 2023 at 15:39 | comment | added | supercat | ...where it will be mapped (e.g. if one had a system with multiple slots for 64KB ROM cartridges, and one needed to be able to insert ROMs for any combination of applications that would fit, along with a startup/program-select ROM that would identify and allow users to select and run any installed program). | |
| Jul 3, 2023 at 15:37 | comment | added | supercat | @PeterCordes: No objection to favoring TEST as an "at least as good in essentially all cases" alternative to OR; the "OR" idiom is one that works--and is named consistently--on almost all kinds of CPUs. My main point was to illustrate the concept of building a vector table in RAM. Although intra-segment calls to a a "far" function will be a byte bigger than calls to a "near" function, far calls performed through the vector table will IIRC be a byte smaller than direct "far call" instructions would be, and will work in scenarios where code might be put in ROM without knowing... | |
| Jul 3, 2023 at 13:57 | comment | added | Peter Cordes |
or cx,cx is not a useful idiom, please don't teach bad habits. Use test cx,cx to set FLAGS according to a register value; it's at least as efficient on all CPUs (except some corner cases on P6-family with register-read stalls which won't apply here since you're writing the register right before testing), and more efficient in many cases (macro-fusion with jcc). See Test whether a register is zero with CMP reg,0 vs OR reg,reg?. On actual 8086 itself, they run identically, zero benefit to the old or reg,reg idiom that probably comes from 8080.
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| Jul 2, 2023 at 16:00 | history | answered | supercat | CC BY-SA 4.0 |