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The Apple II used a 6502 CPU clocked at 1.023 MHz which was tightly tied to the NTSC frequency (1/14 of crystal, 3.5 color clocks per CPU cycle). It is well known that the Disk ][ was primarily software driven and thus cycle counting was extremely important since there was no separate micro controller to abstract the mainboard from what the disk controller was doing.

However, there were PAL and SECAM versions of the Apple II as well. When you look at most 8-bit computers of the era, they were also tied to the NTSC clock in some mathematical way and as a result the PAL versions operated a touch slower because of that video standard's 50Hz cycle versus NTSC's 60Hz.

Did the Apple II use a slower clock frequency for the European versions or was the hardware output abstracted so that the computer could run at 1.023MHz and not introduce Disk ][ incompatibility? Heck, was the ASCII $07 beep a different pitch?

If there was a different speed for non-US / NTSC versions, what accommodations needed to be made?

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Yes, but only a very slightly different speed: the master crystal was around 14.238Mhz rather than 14.31818Mhz. which is only around 0.5% different, so I would expect safely within tolerance for a Disk II.

Something PAL users didn't get from the base machine: colour. The relationship with phase is a lot more complicated in PAL, as that's how the error correction works. Add-ons could decode the NTSC colour and re-encode as PAL but at that point Wozniak's sneaky colour trick has turned into something absurd: rather than eliminating an explicit colour encoder, you've now got one of those and an additional decoder, with the CPU still working to encode colours on its end.

EDIT: source, though it's secondary; strongly suggests the Apple II Reference Manual would confirm a difference, but I can't find a copy online that's new enough to have been revised in light of the European launch.

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    Those poor folks on the other side of the pond, cheated out of a whole 0.08 MHz because of their superior video standard!
    – Cody Gray
    Commented Jun 19, 2017 at 18:25
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    To be fair to all parties, PAL was devised almost a decade after NTSC, taking account of lessons learnt. It's NTSC 2.0. SECAM's the weird one.
    – Tommy
    Commented Jun 19, 2017 at 19:51
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    The manual at archive.org archive.org/stream/Apple_II_Reference_Manual_1979_Apple#page/… has the jumper details and mentions changing the crystal (but not what too).
    – PeterI
    Commented Jun 19, 2017 at 22:41
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    Drive speed is decoupled to some extent by the disk interface card, at least at the level of a single bit. In my answer here, which includes a Disk II nibble count for various drive speeds, I noted that reading and writing from drives calibrated to different speeds seemed to tolerate at least a 10% difference - much larger than the clock difference discussed here. Disk protection that relies on timing over many bytes might have problems though.
    – Nick Westgate
    Commented Jun 20, 2017 at 22:46
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    @Tommy: Even on an NTSC machine, cycles aren't always the same length. The 2MHz master clock from which the 1Mhz CPU clock is derived is normally seven periods of the 14.3818Mhz master clock, but the only multiple of 7 which is near the horizontal scan rate is 910, which is not a multiple of 4. Making chroma phase be constant every scan line requires that each line be a multiple of four 14.3818Mhz cycles, so Apple adds two extra cycles of that clock per scan line.
    – supercat
    Commented Apr 24, 2018 at 16:13

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