As a personal project I had the idea to create a custom cartridge for my Commodore 64 and use an ATmega 1284p microcontroller to emulate eproms and/or custom chips.
Basically my idea is similar to the one presented in this project from Hackaday: https://hackaday.io/project/28120-c64-production-cartridge except that that project uses a PIC.
Now, my question is about how to wire some of the lines coming out from the commodore expansion port to my ATmega. As shown in the schematics below, address and data lines take 24 pins (3 ports in my mcu) leaving me with 8 pins available. I did some research on the various lines provided by the expansion port, I found most of the information here: https://www.c64-wiki.com/wiki/Expansion_Port and here: https://www.c64-wiki.com/wiki/Bank_Switching
I'm pretty sure that to have a cartrige that can also be used as a custom chip other than an eprom I need the following lines connected to my MCU:
1. _GAME (I could use a jumper for this, but I'd prefer the MCU to control it)
2. _EXROM (same as _GAME)
3. R/_W (so I can also write to my MCU and not just read)
4. PHI2 (might be useful to synchronize with the system clock)
This way I have used 4 out of 8 available pins, but now I'm a bit confused about these remaining lines:
1. _IO1 and _IO2: "Signal is low if address bus is within $DE00-$DEFF". Since these lines notify that some addresses are used for memory mapped IO, does it mean that they go low if address is within $DE00-$DEFF AND addresses $D000-$DFFF are bank switched to IO (Mode7 for example) or _IO1 and _IO2 lines go low just when the address is in the specified range? Because if it's the latter, these 2 lines are useless as I can simply read the address lines and know if I'm in the $DE00-$DEFF range. Reading from the bank switching wiki, it also says: "$DE00-$DFFF is special and reserved for I/O with chips on the expansion port (by wiring the IOx lines of the port to the enable pins of the chips)". Does it mean that those 512 addresses are always for expansion port IO regardless of the selected bank switching mode?
2. _ROML and _ROMH: these lines contribute to bank switching from the CPU side. Again I'm not sure I need those: from the description it seems I can deduce their state from _GAME, _EXROM and the address lines. Are these lines there just to simplify cartrige hardware (the same deduction i can make via software would require a series of logic ports on the cartrige) or am I missing something?
3. _DMA: this confuses me a bit: the explanation says: "if _DMA=Low the CPU can be requested to release the bus. It will stop after the next read cycle and all bus lines will go to high resistance state. So other units can use the computer hardware. At _DMA=High the CPU continues to work." Does it mean that if _DMA is pulled low the cartrige can than access hardware like the c64 ram and write to it? Because if it's like that I would expect address lines to be IO and not just Out like explained in the documentation above.
4. BA: More just for curiosity, since I don't plan to use it, but: it's marked as Input, but it also says that it's controlled by the VIC chip. So, since it's an input I would expect that the cartridge can control it, but without knowing what VIC is doing I suppose it could create some conflicts modifying its state.
So long story short: I'd like to know if my suppositions are correct or if I misinterpreted something before wiring the remaining lines, so I can know how to best use the 4 remaining pins on my MCU.
Thanks in advance.