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The FPI (fast processor interface) ASIC in the Apple IIgs generates the /CROMSEL chip-select signal, which is used to select a ROM in the memory expansion slot. Obviously the /CROMSEL signal must be asserted for read accesses to the extended ROM space, but what about write accesses? If the 65816 performs a write to the extended rom space in banks F0-FD (F0-FB for ROM 3 systems), does the FPI assert /CROMSEL?

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No, for writes to the extended ROM space, the IIgs ROM 01 FPI memory controller does not assert /CROMSEL. I assume it’s the same for the newer CYA memory controller chip in ROM 03 systems but I have not tested.

Here are the logic analyzer traces. First is a read from F0/0000, in which /CROMSEL is asserted as expected: ROM 01 IIgs extended ROM read

Next is a write to the same address, in which /CROMSEL remains unasserted during phi2: ROM 01 IIgs extended ROM write

Interestingly, there is a 32ns period after the write to F0/0000 is over in which /CROMSEL becomes active, before going back to deselected before the end of /phi2. This suggests that in the FPI, /CROMSEL is implemented as an asynchronous disjunction of /WE and a registered address.

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If the 65816 performs a write to the extended rom space in banks F0-FD (F0-FB for ROM 3 systems), does the FPI assert /CROMSEL?

Yes, it does. CROMSEL is a select signal, and as such only dependant on the address, not any other signal (like direction).

The reason of providing CROMSEL is to make extended ROM selection easy and safe by avoiding the chance that ROM (card) developers only decode for Fx, creating a potential address collision for banks FE and FF.

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  • "Select signal" does not necessarily mean that the /R, /W or R//W signals are not used to calculate the signal. There are also a lot of examples where a write to some address and a read from the same address access totally different devices.
    – Martin Rosenau
    Apr 28, 2019 at 17:38
  • @MartinRosenau And that's related how? Even with the special case soft switches (which I guess you want to refer to), you need to differentiate between an address driven select signal, and a function selection by direction. Beside that, mind to explain why you think this invalidates my answer?
    – Raffzahn
    Apr 28, 2019 at 20:49
  • And that's related how? It's only because you wrote: "... is a select signal, and as such only dependent on the address ...". I just looked on the Acorn A3000 schematic: The ROM (sharing the address space with the MMU) /CS signal must be dependent on the direction (read) because the W//R signal is not connected to the ROMs... So there are examples of /CS signals being dependent on the W//R signal.
    – Martin Rosenau
    Apr 29, 2019 at 2:36
  • Thanks for sharing your knowledge, @Raffzahn, but I am looking for a citation or at least some anecdotal story about it, not just speculation. Thanks for explaining select signals, but MartinRosenau is right, and his example is spot-on. Often it is a good idea to not select a ROM when writing so that its /OE pin can be tied low without concern for bus contention. Eventually I will capture a trace with my logic analyzer showing what happens.
    – Zane Kaminski
    Apr 29, 2019 at 4:18
  • @MartinRosenau I see, you're viewing it from the receiving chip perspective. A valid PoV, but rather unusual when designing a system as select (not chip select) design is viewed from the generation side. Especially on the Apple II, where Woz played a lot with 'em :)
    – Raffzahn
    Apr 30, 2019 at 6:54

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