The MC68000 can take up to 70 clock cycles to multiply.
The ZX Spectrum Next's Z80N has a "mul de" instruction that always takes 8 T-States.
It's 'only' an unsigned 8x8 multiplication, as the 8 bit registers
E will be multiplied and the 16 bit Result stored in
DE, while the 68k multiplications (
MULS being the signed version) is a 16x16 multiplication.
How does it do that? What is the difference between how they work?
By the Z80N
MUL being a more simple operation and at the same time throwing much more hardware at it?
MULS is implemented in micro code, as adding a hardware multiplier would have enlarged the CPU quite a lot.
The Spectrum Next is build using an Xilinx Spartan-6 FGPA (Type XC6SLX 16), a chip with SEVERAL TEN THOUSAND TIMES or maybe even more than HUNDRED THOUSAND TIMES (depending if the RAM is counted) the transistor count of an 68000 (which itself is already about 7 to 8 times as much as the original Z80). Easy to offer 8x8 bit hardware multipliers with a monster like that.
In fact, it's safe to assume that it could be way faster than the 8 T-States, as these seam to be in line with the RMW nature of the instruction. All to make them work out in a comparable relative timing as the real Z80. Given the hardware such an FPGA provides, eZ80 like timing or even lower can be easy archived - ofc, this would make it hard to slow it down to play timing dependant games from a real Spectrum :))
Bottom line: It's simply the result of 40 years of Moore's Law.