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The address bus of the Intel 8086 CPU is 20-bits, and when you want to specify a memory address to read from or write to, you would form the memory address using a segment register and an offset register combination.

But the memory address that the segment register+offset register forms is not a real memory address, it has to be converted first into another real memory address and then it can be used for reading or writing.

But why doesn't the Intel 8086 CPU use real memory addresses from the beginning?

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    Is this a duplicate of Why didn't the 8086 use linear addressing? Commented Jul 16, 2019 at 16:41
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    What do you mean by this: "But the memory address that the segment register+offset register forms is not a real memory address, it has to be converted first into another real memory address and then it can be used for reading or writing." What is this conversion you speak of that happens after the addition of seg*16 + offset??
    – Erik Eidt
    Commented Jul 16, 2019 at 16:49
  • Do you mean 8086, or 80x86? Real mode isn't a thing in the 8086, but it is a thing in some other processors from the 80x86 family. Or by "real memory address," do you mean "physical memory address?" Commented Jul 16, 2019 at 17:15
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    The "memory address that the segment register [multiplied by 0x10] + offset register forms" is indeed a "real" memory address; doing this effective address calculation based on, say, DS and a specified offset is little different from doing an effective address calculation based on any other register, such as IX plus a fixed offset in a 6800 CPU. There is no further conversion after the DS*0x10+offset calculation; that result is presented directly on the external address bus.
    – cjs
    Commented Jul 17, 2019 at 0:49
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    Also, I'm not sure that this is really a duplicate; it sounds as if the OP thinks that some additional processing outside of the segmentation handling is being done, and answers should aim at correcting that.
    – cjs
    Commented Jul 17, 2019 at 0:52

1 Answer 1

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But the memory address that the segment register+offset register forms is not a real memory address, it has to be converted first into another real memory address and then it can be used for reading or writing.

The only transformation is the “segment × 16 + offset” calculation, which yields a physical address which is emitted as-is on the address bus. There is no further transformation.

But why doesn't the Intel 8086 CPU use real memory addresses from the beginning?

I’ve interpreted “from the beginning” as “internally”, or “in its address registers”, and your overall question as “why doesn’t the Intel 8086 CPU manipulate 20-bit physical addresses internally”, or as I put it earlier, “why does the Intel 8086 CPU encode its physical addresses using a segment and offset” (instead of a single 20-bit value).

The simple answer to that is that it’s a 16-bit CPU, with 16-bit-wide registers (and words); so its 20-bit addresses can’t be represented using a single register, and it can’t perform arithmetic on them. The designers of the 8086 considered other approaches; Intel Microprocessors: 8008 to 8086 says that

Various alternatives for extending the 8080 address space were considered. One such alternative consisted of appending 8 rather than 4 low-order zero bits to the contents of a segment register, thereby providing a 24-bit physical address capable of addressing up to 16 megabytes of memory. This was rejected for the following reasons:

  • Segments would be forced to start on 256-byte boundaries, resulting in excessive memory fragmentation.

  • The 4 additional pins that would he required on the chip were not available.

  • It was felt that a 1-megabyte address space was sufficient.

Beyond the technical considerations of supporting 24-bit- or 32-bit-wide addresses, there were also backward-compatibility considerations which led to the use of 16-bit-wide registers only; these are detailed in the answers to Why didn't the 8086 use linear addressing?

When developing on the 8086, developers didn’t really consider the segment:offset addresses as any different from physical memory addresses; I know my brain could quickly perform the shift and addition involved (helped by the choice of segment addresses which were usually “nice to handle”).

This ignores the address decoding hardware, which can of course do anything it likes; see Does the Intel 8085 CPU use real memory addresses? for related discussions.

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  • "The simple answer to that is that it’s a 16-bit CPU" that sentence needs to be made bold, blinking kursive, underlined and scrolling as it is right at the point. it's a 16 bit CPU, not 16 Bit with some restricted 20 bit or whatsoever.
    – Raffzahn
    Commented Jul 16, 2019 at 18:52
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    Which is confusing because most 8-bit CPUs have 16 bit address buses, and many have 16 bit registers and instructions to handle it. So does that mean they are really "8 bit with some restricted 16 bit"? Commented Jul 16, 2019 at 21:57
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    @BruceAbbott, yes, that is exactly right. 8-bit CPU's usually have an 8-bit ALU, so they can do general purpose ~computation: AND, OR, SHIFT, ADD, SUB, etc.. in 8-bits, and only very specific certain ADD operations in 16-bit index registers, with purpose of supporting 16-bit address space, in recognition that an 8 bit address space just won't do.
    – Erik Eidt
    Commented Jul 16, 2019 at 23:19
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    It doesn't sound to me like the question is "why does the Intel 8086 CPU encode its physical addresses using a segment and offset," it sounds to me as if the question is, "what processing is done to generate the effective address?"
    – cjs
    Commented Jul 17, 2019 at 0:55
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    @JeremyP I'm all with you. The 68000 is a 16 bit implementation of the 32 bit 68k ISA. The same way as the 8088 is (in part) an 8 bit implementation (regarding the BIU) of the 16 bit x86 ISA. Or the Pentium Pro being a 32 Bit CPU, despite having a 36 bit physical address.
    – Raffzahn
    Commented Jul 17, 2019 at 9:10

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