Was there some particular design theory or constraint that made a 36 bit word size attractive for early computers? As opposed to the various power-of-2 word sizes which seem to have won out?
I'm going to address the power of 2 part of the question.
Keep in mind that before microprocessors, computers were assembled by hand. Increasing the number of bits in a computer was really a big deal. Each time you added one bit to the word size, you would need
- more parts in the register file
- more parts in the ALU
- more wires in the buses
- more cells in memory
- more parts (relays, vacuum tubes, transistors, or small-scale ICs) to make all the above
- more circuit boards
- more time to assemble and solder (or wire-wrap) the parts
- and more cost for the parts and labor of all of the above.
This wasn't just a one-time design cost. Every unit sold had these extra costs for each added bit. If there wasn't a good reason to add another bit, they didn't add it. And rounding up to the next power of 2 was not a good reason.
This wasn't just limited to processor word sizes. Drum memories were not powers of 2. EBCDIC was not a power of 2 (6 bits). ASCII was not a power of 2 (7 bits).
So why are powers of 2 dominant now?
- IC transistors cost practically nothing compared to relays, vacuum tubes, or discrete transistors. You don't have to hire someone to solder them together. So there's little incentive to keep the part count low, and little penalty to round up the number of bits to a power of 2.
- Automated chip design tools make it very easy to add more bits during chip design.
- Doubling the width of registers can often make a new architecture compatible with the old architecture, either as source code or actual executables. There were many 18-bit systems, and some of these architectures went on to become 36-bit systems.
- Intel created the first commercially-available microprocessor as a power of 2: the 4004 was 4 bits. Subsequent architectures doubled the register size, resulting in power-of-2 architectures: the 8008 was 8 bits, 8086 was 16 bits, and 80386 was 32 bits.
- Competition causes different manufacturers to offer something similar to their competitors. There was a time when 18 bits was popular among several manufacturers. Then 36 bits were in vogue. Then 8-bit microprocessors. Followed by the age of 16-bit processors, then 32 bits, and 64 bits today.
- Finally, powers of 2 seem "natural" or "elegant". We are suspicious of a platform that isn't so, even if it is perfectly valid. Would you like to buy this lovely 67-bit processor? No?
Was there some particular design theory or constraint that made a 36 bit word size attractive for early computers?
Beside integer arithmetic, 36 bit words work quite fine with two different byte sizes: Six and nine. Six bit was what's needed to store characters of the standard code for data transmission at that time: Baudot code or more exactly ITA2.
As opposed to the various power-of-2 word sizes?
There is no inherent benefit of power of two word sizes. Any number can do.
Even more, there were no 'various power-of-two sizes' in the early and not so early days. Before the IBM/360 settled for a 32 Bit word size and four 8 bit bytes within a word and two nibble in a byte, power-of-two word sizes were an extreme exception (can't come up with any beside SAGE and IBM Stretch). The vast majority used word sizes dividable by 3 not at least to allow the use of octal representation. Before the IBM /360 with its 8 bit bytes, octal was as common to computer scientists as hex today - heck, Unix carries this legacy until today, making everyone learn octal at a time when hex is the generally accepted way to display binary data.
Now, the reason why Amdahl did choose 8 bit bytes is rather simple: A byte size chosen had to be at least 6 bit to store a character, eventually 7 for the upcoming ASCII, but 8 would give the ability to store two BCD digits within. Any larger byte size would again waste storage with this important element. Operating in BCD was one main requirement for the /360 design, as it was meant to not only be compatible to, but as well replace all prior decimal machinery.
What seems today as 'natural' use of power of two is just a side effect from being able to handle decimal by a binary computer.
Conclusion: As so often in computing the answer is IBM /360 and the rest is history :)
36 bit word size attractive
Many sizes have been tried, but fundamentally, this results in a certain precision; from Wikpedia on 36-bit
Early binary computers aimed at the same market therefore often used a 36-bit word length. This was long enough to represent positive and negative integers to an accuracy of ten decimal digits (35 bits would have been the minimum). It also allowed the storage of six alphanumeric characters encoded in a six-bit character code.
As opposed to the various power-of-2 word sizes?
It is lack of requirement to conform to pre-existing specifications, for example, no internet, even simple disc files were not easily shared between computers back in those days.
The key point made by Wikipedia seems to be:
Prior to the introduction of computers, the state of the art in precision scientific and engineering calculation was the ten-digit, electrically powered, mechanical calculator....Computers, as the new competitor, had to match that accuracy....
Many early computers did this by storing decimal digits. But when switching to binary:
Early binary computers aimed at the same market therefore often used a 36-bit word length. This was long enough to represent positive and negative integers to an accuracy of ten decimal digits (35 bits would have been the minimum).
35 bits is obviously a slightly more awkward size than 36 bits anyway, but there are other reasons to choose it if your minimium size is 35 bits.
36 bits was on average a bit more efficient when packing characters into a word, especially for the 6-bit character encodings common at the time:
Char size | 35 bit word | 36 bit word ----------+-------------------+------------------- 6-bit | 5 + 5 bits unused | 6 + 0 bits unused 7-bit | 5 + 0 bits unused | 5 + 1 bit unused 8-bit | 4 + 3 bits unused | 4 + 4 bits unused
If you intend to make smaller computers later, having registers that are exactly divisible by two makes having some level of data interoperability easier, if not perfect. (Numerical data in a single large word can easily be split into two smaller high and low words, and a 6-char x 6-bit word can be split into two 3-char words, but splitting a 36-bit word with packed 7- and 8-bit character data would result in either splitting parts of characters between the smaller words or adding additional smaller words and ending up using more bits than the original larger word.)
Wiki page 36-bit shows some reasons (all copied from the page):
"This was long enough to represent positive and negative integers to an accuracy of ten decimal digits (35 bits would have been the minimum). It also allowed the storage of six alphanumeric characters encoded in a six-bit character code. "
And for characters:
- six 5.32-bit DEC Radix-50 characters, plus four spare bits
- six 6-bit Fieldata or IBM BCD characters (ubiquitous in early usage)
- six 6-bit ASCII characters, supporting the upper-case unaccented letters, digits, space, and most ASCII punctuation characters. It was used on the PDP-6 and PDP-10 under the name sixbit.
- five 7-bit characters and 1 unused bit (the usual PDP-6/10 convention, called five- seven ASCII)1
- four 8-bit characters (7-bit ASCII plus 1 spare bit, or 8-bit EBCDIC), plus four spare bits
- four 9-bit characters1 (the Multics convention).
When I was first exposed to this stuff in engineering school in 1978, I was taught that a "byte" could be either six or eight bits; the former were usually represented as two octal digits, and the latter by two hex digits. Most of the computers I used in college (PDP-8s and a CDC 6600) were based on six-bit bytes.
There were quite a few computers using odd word sizes in the '70s; probably there were more different architectures based on 6-bit bytes than 8-bit bytes. The PDP-8 was a 12-bit machine; Harris actually sold a microprocessor compatible with the PDP-8 instruction set.
DEC also made 36-bit machines for a while. The CDC6600 and 7600 were 60-bit machines. I gather that there were quite a few 18-bit machines in military applications, but I've only ever worked with those architectures in emulation (and I'm confident there are still emulators of 18-bit processors being built).
There probably are still 36-bit machines (or at least 36-bit software) running production EDI applications, because General Electric kept using their own computers in their EDI services business long after they'd sold that hardware business off to Honeywell (and in fact after Honeywell sold it to Bull). Although these days I'd guess they're running in emulation on 8-bit hardware.
From my perspective there was no more rationale than success in the marketplace, and the turning point was Intel's choice of 8 bits for single-chip microprocessors.
Computers used to be all sorts of varying standards for varying reasons. When only large businesses could afford a computer, they bought or designed a computer for the reasons they needed. Thus, there were systems including 4, 6, 8, 13, 16, 18, 24, 26, 32, 36, etc.
There have been computers using binary and trinary (ternary).
Eventually, due to the popularization of Intel CPU along with many other Risc chips being 16-32-64 binary bits, these became the standard.
Windows 7-x64-Home only allowed 8 or 16 GB of memory address space in 64-bit mode.
Today, most 64-bit CPU have a 48-bit memory interface, with 56 as an option. Many BIOS/EFI don't have 48-bits, and might only allow 36, 38, 40 or whatever bits of memory space. E.g. many systems cannot address more than 16 GB or 64 GB, or whatever. The CPU and OS can use the remainder as swap/page file space.