How two 260ns RAM accesses could fit in 500ns?
By using a 250ns (*1) tRC cycle?
And yes, strictly that's out of spec. Still chances are very good that each and every chips will make it, as the timing range selected is rather conservative to start with. Even more so as this value is usually defined by the makers as being guarantied over the the whole temperature range (*2). But most important chips are usually way better than designated and downgraded for marketing reason.
Long Answer:
There are three factors
a) Angst Timing.
When looking at the data sheet it becomes obvious that the timing for the lowest grade (-15) is even more careful than for any other:
tRAS tCSH tRP tRC
-10 100 100 90 200
-12 120 120 90 220
-15 150 150 100 260
This might look fine, until one notices that they don't add up in case of 150ns chips. tRC is defined as tRAS+tRP (or tCSH+tRP) (*3). So by suddenly adding another 10 ns, chip manufacturer allowed more chips to fall into the -15 category. Something only real relevant in the beginning of production.
c) Less Stressful Environment
Datasheet values are always guaranteed for certain conditions like humidity and temperature. In case of 41256, they all guaranteed the values to be acceptable over the whole range of 0 to 70 degree Celsius (*4,5). An Atari gets rarely heated up to more than 40 degree (after all, its user needs to stay alive), so there is quite some room.
b) Market Optimization.
All speed grades (-10, -12 and -15) are made from the same wafers, just selected to grade. Higher grade will fetch higher prices from the ones that need it. Over time production yield gets better, so there will be more high grade chips. But the market doesn't need that many. Pushing them out at real grades would make the price drop. So they get get stamped, not only to grade but also what can be sold/is in demand.
While yield is an issue in the very beginning of a new production, it soon closes in on 100% levels. 41256 were introduced in 1983, so by the time the Atari hit the market (Christmas 1985), production yield was already maxed out.
So it's all about profit maximization when a wafer yields 100% -10 chips, the manufacturer can of course sell them as -10, but prices will drop quite fast to what -15s are. Selling most of it as -15 and some as -12 and -10 grades, the over all profit will be higher - just by applying a different stamp (*6)
*1 - In reality it was even a tiny bit less than 250ns.
*2 - See footnote 12 on page 42 of this Siemens HYB41256 datasheet.
*3 - Yes, I know there are more finer details, but for this we can ignore them, as they would add up the same way.
*4 - Not doing so would have been a major hurdle in competition.
*5 - In reality they are usually way more reliable, but again, guaranteeing this for customers needing the extended range is a great way to ramp up prices. Ever wondered why the very same chip when installed in some military device suddenly costs a fortune? High cost in these areas are less to hide payments for experiments on aliens, but go to manufacturers who let the government bleed whatever is possible ... like with all of us. It's called market.
*6 - The whole thing is a bit like ticket prices on an airplane. All passenger will get the same flight time and all have to wait for the last tourist to stow his baggage. The plane's seat configuration isn't fixed and can be changed (at a base) within hours (if it's not done by changing the little head cushions colour). So how many first, business and sardine seats are mounted is determinated by how many higher priced seats can be sold during the day on the segments the plane will do. And these seats will make much of the profit, as their increased price is not in relation to the increased effort.
