From the Atari SM124 Monochrome Monitor Service Manual, I get that the video signal timing for one line is 20µs. With the horizontal resolution of 640 pixels, this gives a 31.25ns pixel clock.

Using the T3-T4 times of the 8MHz 68000 CPU to access RAM, I find that there is 250ns left in the T1-T2 times for the video hardware to fetch 16bits to generate the signal during the T1-T4 period.

The only problem with this assumption is that on every picture of the original 520ST motherboard that I could get my hands on, the 256Kx1 RAM chips have an 150ns access time, thus a 260ns cycle time, according to original datasheets.

How two 260ns RAM accesses could fit in 500ns?

  • I've definitely read anecdotal reports that Atari always used RAM a little over spec, insisting that it's really an analogue component, after all. I think from the same source that described his work on a tiny bit-masking MMU that didn't make it into the original ST. If I can find the reference, I'll write an answer. – Tommy Aug 9 '19 at 11:29
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    The specs just define values that can be guaranteed under all operating conditions. I think that under common conditions (indoor, 15 to 30 °C) practically all chips are quite better. – the busybee Aug 9 '19 at 11:57
  • Never thought I would upvote an ATARI question! The shame. – pipe Aug 10 '19 at 9:54

How two 260ns RAM accesses could fit in 500ns?

By using a 250ns (*1) tRC cycle?

And yes, strictly that's out of spec. Still chances are very good that each and every chips will make it, as the timing range selected is rather conservative to start with. Even more so as this value is usually defined by the makers as being guarantied over the the whole temperature range (*2). But most important chips are usually way better than designated and downgraded for marketing reason.

Long Answer:

There are three factors

a) Angst Timing.

When looking at the data sheet it becomes obvious that the timing for the lowest grade (-15) is even more careful than for any other:

     tRAS   tCSH   tRP    tRC
-10  100    100     90    200
-12  120    120     90    220
-15  150    150    100    260

This might look fine, until one notices that they don't add up in case of 150ns chips. tRC is defined as tRAS+tRP (or tCSH+tRP) (*3). So by suddenly adding another 10 ns, chip manufacturer allowed more chips to fall into the -15 category. Something only real relevant in the beginning of production.

c) Less Stressful Environment

Datasheet values are always guaranteed for certain conditions like humidity and temperature. In case of 41256, they all guaranteed the values to be acceptable over the whole range of 0 to 70 degree Celsius (*4,5). An Atari gets rarely heated up to more than 40 degree (after all, its user needs to stay alive), so there is quite some room.

b) Market Optimization.

All speed grades (-10, -12 and -15) are made from the same wafers, just selected to grade. Higher grade will fetch higher prices from the ones that need it. Over time production yield gets better, so there will be more high grade chips. But the market doesn't need that many. Pushing them out at real grades would make the price drop. So they get get stamped, not only to grade but also what can be sold/is in demand.

While yield is an issue in the very beginning of a new production, it soon closes in on 100% levels. 41256 were introduced in 1983, so by the time the Atari hit the market (Christmas 1985), production yield was already maxed out.

So it's all about profit maximization when a wafer yields 100% -10 chips, the manufacturer can of course sell them as -10, but prices will drop quite fast to what -15s are. Selling most of it as -15 and some as -12 and -10 grades, the over all profit will be higher - just by applying a different stamp (*6)

*1 - In reality it was even a tiny bit less than 250ns.

*2 - See footnote 12 on page 42 of this Siemens HYB41256 datasheet.

*3 - Yes, I know there are more finer details, but for this we can ignore them, as they would add up the same way.

*4 - Not doing so would have been a major hurdle in competition.

*5 - In reality they are usually way more reliable, but again, guaranteeing this for customers needing the extended range is a great way to ramp up prices. Ever wondered why the very same chip when installed in some military device suddenly costs a fortune? High cost in these areas are less to hide payments for experiments on aliens, but go to manufacturers who let the government bleed whatever is possible ... like with all of us. It's called market.

*6 - The whole thing is a bit like ticket prices on an airplane. All passenger will get the same flight time and all have to wait for the last tourist to stow his baggage. The plane's seat configuration isn't fixed and can be changed (at a base) within hours (if it's not done by changing the little head cushions colour). So how many first, business and sardine seats are mounted is determinated by how many higher priced seats can be sold during the day on the segments the plane will do. And these seats will make much of the profit, as their increased price is not in relation to the increased effort.

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    From the link I was looking for, dadhacker.com/blog/?p=1383 : "Furthermore, the memory system of the ST wouldn’t tolerate the delays that a traditional MMU would incur; the ST’s DRAMs were being thrashed ten or fifteeen nanoseconds under spec (“You have to understand,” said our hardware guys, “DRAMs are really analog devices,” and I’m sure a DRAM designer somewhere felt cold and shivery all of a sudden, and didn’t know why)." – Tommy Aug 9 '19 at 19:19
  • @Tommy hihi, great read. Thanks. But I doubt there was such an effect, as really all RAM was way better than these minimum specs. – Raffzahn Aug 9 '19 at 19:38

Actually, many of the early microcomputer systems were designed in violation of worst case timing specifications, perhaps under the assumption that if the prototypes worked (due to statistical variation in the chips and environment (temperature, voltage, EM noise, etc.)), so would a high enough percentage of the production line. High temperature burn-in was often used to help weed out the units that failed due to worst case timing. (Customer returns of flakey units may have been higher during summer months.)

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  • The issue isn't just statistical variation, but also the fact that the specs allow for worst-case variations in voltage and temperature. On the other hand, the fact that some microcomputers push such limits may contribute to their becoming unreliable if they get hot. – supercat Aug 13 '19 at 15:24

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