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Since ATMega328 is a microcontroller, and Motorola 68000/68010 is a CPU, we consider only the processor core - command execution speed, memory access speed, arithmetic speed, registers in RAM or CPU, etc.

The ATMega datasheet says that for 1 Mhz the chip produces 1 Mips. Usually these chips work on 8/16 Mhz, which means they give out 8/16 Mips. A Mips article on the wiki says that Motorola 68010 at 16 Mhz produces ~ 3.2 Mips.

But, M68k is CISC, and AVR is RISC. In theory, one MIPS of M68k has more calculations inside the core, due to CISC. And one MIPS of AVR has fewer calculations within the core, due to RISC. It turns out that in terms of the amount of information processed, MIPS of CISC is denser than MIPS of RISC.

So, which of these two chips will be more productive at the processor core level?

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    The ATmega328 requires (mostly) one clock cycle per instruction, while the 68000 takes at least 4. So the Atmega has higher mips, but it cycles its memory 4 times as fast. For small jobs its quicker, but If you need more than 2K of RAM it must use external memory which is much slower. It's really an 'apples to oranges' comparison because they are designed for very different applications. Aug 26 '19 at 0:50
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Chips aren't either "RISC" or "CISC"; they fall on a spectrum between the two. The 68000 is less "CISC" than an 80x86, for example, and you could plausibly call the 6502 a somewhat "RISC" processor by the kind of definitions used that make the Amtel AVR "RISC." This isn't really very useful as a guideline for how much processing power you have.

And MIPS particularly don't make sense when you're comparing a machine with 8-bit registers to one with 32-bit registers. A 68000 can do a 32-bit add or shift in one instruction; an AVR will take four or more instructions. A simple load of 32-bits of data from memory into registers takes one instruction on the 68000, but four on the AVR.

Another issue to consider is bus widths; the ATMega328 has an 8-bit data bus whereas the 68000 has (with most variants) a 16-bit data bus, and so it would, all else being equal, be moving data from RAM twice as fast as the AVR. (But all else is not equal, since the AVR has RAM on chip.)

And, of course, productivity depends on the application. If you are doing long sequences of manipulation of 8-bit values, having 32-bit registers that could work just as fast with 32-bit values isn't really any advantage at all. (In fact, you might even be worse off.)

So in short, your question can't be answered because "it depends on the application." Neither of these is clearly faster than the other most of the time. (And this is likely true of most popular CPUs operating in this clock range.)

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The ATMega datasheet says that for 1 Mhz the chip produces 1 Mips. Usually these chips work on 8/16 Mhz, which means they give out 8/16 Mips.

Atmel (Microchip) doesn't claim 1 Mips per MHz, but "Up to 16 MIPS Throughput at 16MHz". It would be 16 MIPS if only 1 clock instructions were uses, but there are many (*1) taking two cycles, some doing 3 (*2) or even 4 (*3) lowering this depending on the instruction mix used to maybe 0.7 MIPS per MHz.

A Mips article on the wiki says that Motorola 68010 at 16 Mhz produces ~ 3.2 Mips.

Sounds like a reasonable number in a real world szenario.

THen again MIPS doesn't mean anything - at least not across different ISA. It was coined as a figure for comparison in the commercial mainframe world, where all all CPUs adhere to the basic /370 ISA and does work there. People asking the same for other architectures did only get meaningless numbers. In fact, it gets even meaningless in the same ISA - family when comparing at too distant offspring, like 8086 vs. Pentium, as the relevant code will differ vastly.

Doing so for complete different architectures is useless. For example around 1981 an 8 MHz Z80 could deliver in the 1 MIPS region, making a good PC running Wordstar for a single user. At the same time a /370 compatible Siemens 7760 (X4S CPU) delivered about 0.9 MIPS - but served up to 300 concurrent users.

This difference is only in part due the 8 vs. 32 bit nature, but moreso a result of the whole CPU and machine structure. With a good amount of additional hardware (dedicated CPU for I/O plus DMA and lotsa memory), this Z80 can be made to serve 5-8 users as well, but that's still several magnitude less than the /370 does with less MIPS.

Bottom line, MIPS do work within one ISA and a defined application mix to measure against.

But, M68k is CISC, and AVR is RISC.

RISC and CISC again doesn't mean much - and most definitely less than marketing wants to tell us. Keep in mind, there was no CISC definition before RISC proponents coined their ideas - but at the same time many pre RISC CPUs did already implement all of them (*4). So it's more of a design guideline how to structure an ISA than a real difference. And like any such, real life application will diverge when there's a gain (*5)

So, which of these two chips will be more productive at the processor core level?

MIPS numbers do not give any answer to productivity. Similar MHz (*6) This can only be seen when it comes to real applications.

For example when it comes to byte operations a 68000 is, clock for clock, not faster than a 6502, but when handling 16 bit values and lots thereof, it'll run circles around its 8 bit distant relative.

Bottom line: Pick your application and measure.

I guess that's where your question may be originated: Selecting the right core for an application. More than ISA and basic performance this is about application related capabilities. If every data you need fits into 2 KiB of RAM, is satisfied by the peripherals available and operations are mostly control instructions, then an ATMega may be a real good choice. But if you need to handle more memory, address more (diverse) I/O, or got some serious 32 bit number crunchign ahead, then a ColdFire will be a better choice.


*1 - Most notably all jumps, taken branches, loads and stores.

*2 - Relative/indirect call, indirect jump and LPM.

*3 - CALL/RET/IRET

*4 - Like any type casting diverges from the good idea of type restricted access.

*5 - A bit like in 1980 when in the US Disco was declared dead and House being the new, total different style - except it got exported to the rest of the world still as Disco :))

*6 - Already in the mid 70s it was no big issue to build a 30 MHz transfer based CPU (eventually the ultimate RISC) from standard TTL on a Eurocard, and it has been done. Then again, its real world performance was only as impressive as the MHz/MIPs imply in very special spplications. Using such a beast on word processing would bring it down at least a magnitude.

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