DEC PDP-11 and VAX systems using the Q-Bus had a 'Q-bus map' to map from the bus address space into the physical memory space. This is basically an MMU for devices. On an I/O request from a program, the driver and OS would allocate and initialize map registers, and pass the appropriate bus-virtual address to the device.
It's possible for a contiguous bus-virtual address to be non-contiguous in physical memory, which probably mattered on VAX but not on the -11 systems I programmed.
The Q-bus map is necessarily separate from the map used by running programs (PARs/PDRs in -11, page tables in VAX) because the program that requested the I/O is not necessarily current on the CPU by the time the I/O transfer happens.
See section 3.8.1 in this technical manual for an arbitrarily-chosen MicroVAX CPU. You'll note that the entire map is actually held in physical memory, with a 16-entry TLB to avoid memory accesses. That is, it's your basic (system-wide) page table arrangement.
Similar arrangements exist for Unibus machines, and in particular, the map is needed when there's more than 124 Kwords (18-bits-worth less the I/O page) of memory, since the Unibus is only 18 bits wide.