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I have a PiDP-11 kit, which emulates a PDP-11/70 console. I've been using it as a launch point to gradual learning about the original machines and so far have been able to read/write memory and launch simple machine code routines from the console.

As I begin to tweak and debug such routines, I've had trouble tracking down how to (or whether one even can) inspect the R1–R5 and R6/R7 register contents via the console switches. Do I need to use the "DISPLAY REGISTER" setting on the bottom knob? How do I select which of the registers (and user vs. kernel group) is displayed?

  • Selecting DISPLAY REG means that the contents of the 'display register' are shown in the data lights; that register is 17 777 570. – another-dave Dec 15 '19 at 13:51
  • Minor nit: for R0 to R5 the registers are not 'user/kernel' per the hardware, they are just sets 0 and 1, used however the OS wants. SP (R6) is instanced per mode, There's only one instance of PC (R7). – another-dave Dec 15 '19 at 14:17
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Remember that the registers are also mapped to memory addresses. If you want to examine register R5, this is the same as examining memory location 177705 which you can do from the front panel.

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  • R5 of register set 0 is mapped to bus address 777 705 which probably needs to be entered as 17 777 705 (set ADDR SEL to CONS PHY). – another-dave Dec 15 '19 at 14:10
  • @another Is that model dependant? I think earlier models the registers were mapped to the highest addresses. Then of course some models have more than one register set – OmarL Dec 15 '19 at 16:55
  • The 11/20 and 11/40 Processor Manuals say the "CPU registers" are mapped to 777700 to 777716, which is the same range as used for the two register sets on the 11/70, though the 11/20 and 11/40 only have one set, Looks like this is a standard on Unibus systems; I have not checked Q-bus systems. – another-dave Dec 15 '19 at 17:49
  • 777774 and 777775 are the "stack limit" register where such exists (i.e., systems with a KT11 memory management unit). 777776 and 777777 are the processor status word (PS) on a Unibus -11, – another-dave Dec 15 '19 at 17:55
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Chapter 11 in the PDP-11/70 handbook describes the console operation of the actual 11/70. The fidelity of the PiDP to this is of course a different question; my impression is that 'major' functions are fine, but of course anything related to microcode is not.

Speaking for the 11/70: all of the general registers are mapped to physical addresses, and they're listed in Appendix A (section 4). The two register sets and three stack pointers have different addresses. These are also listed on page 11-4 of the PDP-11/70 handbook:

The General Registers can be examined and deposited using the EXAM and DEP Switches provided the previous LOAD ADRS operation loaded the Address Display with a "register address."

Address       Register
17 777 700    Register 0 (Set 0)
…
17 777 705    Register 5 (Set 0)
17 777 706    Register 6, Kernel Mode
17 777 707    Program Counter
17 777 710    Register 0 (Set 1)
…
17 777 715    Register 5 (Set 1)
17 777 716    Register 6, Supervisor Mode
17 777 717    Register 6, User Mode

Examining and depositing into General Register Addresses is independent of the Address Select Switch. It is not possible to be mapped to a General Register.

For 'bare machine' operation, it's probably convenient to have ADDRESS SELECT on CONS PHYSICAL (and thus addresses are 22 bit physical) and DATA SELECT on DATA PATHS.

By the way, there's a Google group specifically for PiDP-11 questions, in case that's useful. See the 'forum' link from this page.

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  • Thanks, I edited this well-explained response to include the specific addresses that will fully answer my question. I'll also note for anyone finding this that the simh used by PiDP-11 still seems afflicted by github.com/simh/simh/issues/261 or something similar, and won't access these addresses until at least one instruction (even just 0/HALT) has been run. – natevw Dec 16 '19 at 19:00
  • I approved that edit - thanks. – another-dave Dec 16 '19 at 23:52

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