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The Sinclair ZX80 used a Z80A running at 3.25 MHz. But this chip was rated for 4 MHz. Why was it run below rated speed?

Apparently the master clock in the machine ran at 6.5 MHz, so the CPU clock ran at half that, but that just rephrases the question; why not run the master clock at 8 MHz? The CPU and video generation were linked, but that just means a higher frequency would produce a higher horizontal resolution, which seems harmless; it was a black-and-white machine, so it's not like the Atari 800 where the color burst frequency was an external reference standard that had to be taken into account.

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    Higher horizontal resolution isn't "harmless" with only 1K of RAM to play with. Either you have a bigger border round the display, or more characters per line and less RAM available for code. – alephzero Dec 29 '19 at 21:12
  • @alephzero True. Then again, it was already not enough to display a full screen of text (800 bytes). So a higher maximum per line wouldn't have added any further RAM challenge :) – Raffzahn Dec 30 '19 at 2:50
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    Other hardware in the system may not run at the faster speed, or there may be a device that need the 6,5MHz clock and designer did not want to use two oscillators. Also vendor bin parts for speed and the faster parts cost more money. The company simple didn't want to pay more money. – jdweng Jan 1 at 13:09
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TL;DR

Because it needs the least chip count and thus makes it the cheapest. It's a Sinclair.


Full Story:

The Sinclair ZX80 used a Z80A running at 3.25 MHz. But this chip was rated for 4 MHz. Why was it run below rated speed?

And the chip would have run for sure at more than 4 MHz. A computer design isn't about what a chip is rated, but what it's for.

why not run the master clock at 8 MHz? The CPU and video generation were linked, but that just means a higher frequency would produce a higher horizontal resolution,

Sure, but clocking it at 8 MHz wouldn't have generated any gain for its designer, but acted against their goals. It's not about a single frequency, but, like any design, about finding a sweet spot between various goals. While there are many possible combinations, the absolute imperative for the ZX80 was to be cheap.

Speed was of no concern at all. There were other successful home computers with way lower clock speeds than 3.25 MHz (*1).

Main lever to lower cost is the number of gates. For the ZX80/81 a combination of line length, character per row, and pixels per character defined a sweet spot for hardware needed. By using parts of the CPU with as little external logic as possible to handle video generation, these add up to what resolution is to be used. For Details see below.

Atari 800 where the color burst frequency was an external reference standard that had to be taken into account.

The colour burst frequency is irrelevant for the workings of the Atari. It's the same with the ZX80. Using a single clock source for several issues keeps cost down and a colour burst frequency is needed anyway.


The Details:

How it works

Since we're talking about TV, all we need to look at is a single line - and the way the hardware is used to generate it. So, let's take a first look at how a line is generated:

  • At the beginning of a line the refresh counter is cleared (*2).
  • Each character to be displayed is read from RAM like an instruction.
  • The lower 6 bits are used to load a bit image from ROM during the refresh cycle (T3/T4).
  • The value read is outputted via a shift register as 8 pixels at double the CPU clock
  • The CPU gets fed a NOP instead.
  • A single byte NOP instruction takes 4 clocks.
  • Each single byte instruction contains one refresh cycle
  • The refresh counter is incremented during each refresh cycle by one
  • When the refresh counter reaches 32 it spills over to bit 6
  • Bit 6 of the refresh counter issues an interrupt ending line generation.

So the CPU timing for the visible part of a line consists of 32 characters each handled in 4 CPU clocks each or 128 clocks in total.

  • These 128 clocks need to happen within the visible part.
  • The (maximum) visible part of a line is ~52 µs.
  • It's safe to leave at least 10% on each side to make sure it's well within any TV, including rather misaligned ones (*3).
  • As a result some ~40 µs is what line data should take (*4).

This means to deliver this, the CPU clock cycle should take 40 µs / 128 = 0,3125 µs or 3.2 MHz. 3.25 looks close, doesn't it?

What to do

Using the same hardware

One way to increase resolution would be outputting more characters per line (*5). Without adding more hardware, the next higher number per line would be 64, by taping bit 7 of the refresh counter. Now, while a TV in theory could handle this fine (*6), it would need doubling the clock frequency to 6.4 MHz. The CPU may in fact still go along, but ROM and RAM most definitely not. So, even with widening the used time, which would generate other issues in line timing, it's not really possible to get it much below 5.5 MHz (*7).

With the modulator used, the display would be hard to distinguish from static noise.

Modifying the hardware

Of course it is always possible to throw more hardware at the problem. So for example another gate to combine two bits of the refresh counter to detect line end. This would allow line length of 34, 36, 40 or 48 characters per line. By keeping the 40 µs limit, this results in clock frequencies of 3.4, 2.6, 4.0 or 4.8 MHz.

So yes, it would work as you imagine, 40 characters and 4 MHz, but it means an additional AND gate would be needed - since there is no unused one on the ZX80 board, this means a whole chip to be added. Not very Sinclair like.


*1 - For example the KC85 using a Z80 at 1,75 MHz or PMD 85 with an 8080 at 2 MHz

*2 - That's why the refresh counter can not be used for RAM refresh.

*3 - Aka text safe area.

*4 - AFAIR the real ZX80 uses ~37 µs, but as you'll see, 40 will give nice numbers allowing to do the math without a calculator.

*5 - Somewhat frivolous on a computer with just 1 KiB.

*6 - Assuming a good quality signal transmission.

*7 - Like using 46 µs of the line will result in 46 µs/256=0,18 µs or 5.55 MHz

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    @rwallace No. Counting the lines is done in Software - it got zero production cost :)) The area considered visible is 288 (Europe) or 243 (US) lines so using 200 instead of 192 would have worked as well. There is also no aesthetic reason against 25/200. Then again, they as well used only 37 µs or 70% of a line for the picture, so 24 instead of 25 meant that the picture is more secure in the middle of any mall adjusted screen. Your guess is as good as mine. – Raffzahn Dec 30 '19 at 12:14
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    Since the video was "generated" by software, I'd call it "assisted" actually, each line subtracts from the CPU clocks left for "real" work. This might be another reason. And each line needs up to 33 bytes of RAM. Yet another reason. Many terminals at that time displayed 24 lines, too. It might be just a common value. – the busybee Dec 30 '19 at 12:19
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    @thebusybee The ZX80 did not do any work during screen generation. The CPU is 100% occupied. It only tests for a possible keystroke. If one is detected, then it's executed, but no screen is produced. that's why the ZX80 picture breaks with every key pressed. The same why there is no display when the BASIC program is running. Only the ZX81 can do FAST mode, and that's because the ULA features an additional line length counter (up to 207?) which does sync, front and back porch generation. – Raffzahn Dec 30 '19 at 12:25
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    Oh, right. It needs that little hardware patch to enable work in the vertical blank, IIRC. The ZX81's ULA generates NMI after 207 clocks, if enabled. Its service routine controls the number of (pixel) lines for display, vertical blank, and vertical sync. – the busybee Dec 30 '19 at 12:30
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    Regarding "it's a sinclair" - the name giver for the machine, Sir Clive Sinclair, is well known to build very economical and spartan designed devices, squeezing out every penny where possible. This machine was no exception, he wanted it to be able to sell at a certain price, so corners where cut whereever possible to reach the remarkably low level price for its time of £99.95 and even less when you did the soldering/assembly yourself. This low level price tag was revolutionary for 1980 and created a new price bracket. – Marc Stürmer Dec 30 '19 at 17:55
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The usual answer to questions on early Sinclair machines is "Because it was cheaper that way."

In this case, a 40-column screen, implied by 4MHz, would have increased the screen buffer size to at least 960 bytes, leaving only 64 bytes for BASIC code. Increasing the RAM size would have raised the price point, and "Under £100" was crucial to the early success of the machine.

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Answering your rephrased question:

The master clock could have run at 8 MHz, but that would have meant pixels being narrower than if generated by a 6.5 MHz clock. As the computer was built with a horizontal resolution of 256 pixels in mind (the time spent by 32 NOP instructions), the border area would have been enlarged, resulting in a smaller display. Besides, running the CPU at its highest clock rate may introduce spurious errors, so Sinclair opted for leaving a security margin.

Take into account that, for cost reasons, the ZX80 doesn't have any buffers on the CPU lines. Being an NMOS device, the faster you operate it (without buffers), the uglier and less squared signals come from it, compromising the reliability of the computer.

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