According to http://www.quadibloc.com/comp/cp0201.htm

The CDC 1604 used 48-bit floating point with 11 bits exponent and 36 bits mantissa. There was also a double precision format (which I believe was added later as an option) that simply adds an extra 48 bits of mantissa.

The CDC 6600 went up to 60 bits, 11 exponent, 48 mantissa. There does not seem to have been a double precision option.

I think it is worth noting that both computers came not only from the same company but the same designer, Seymour Cray. So the designer changed his mind, between those two machines, about the optimal floating-point size. (We are used to word size being mostly about the required size of addresses, but these computers were built primarily for fast floating-point arithmetic; the address sizes were separate and smaller.)

I can think of two reasons why he might've changed his mind:

  1. Experience with the 1604 showed 48 bits was not always enough, so a double precision option had to be added. Cray took that experience into account when designing the 6600.

  2. Maybe 48 bits was enough for the 1604, but was not enough for the 6600, which because of its greater performance would be used to perform longer chains of calculations, creating more opportunities for rounding error.

In other words, was the 48-bit 1604 a mistake, discovered to be such once it had been used in production for a while? Or was 48 bits the right choice for the 1604 but not for the more powerful successor?

Or was there another factor I'm not taking into account?

  • 2
    I think a full answer to this would be a book on the history of the development of numerical methods in scientific computing. But to give one relevant data point, there are important methods used in structural analysis which require about 9 accurate decimal digits, i.e. about a 32-bit mantissa, plus about 50% more to allow for numerical precision issues (e.g. subtraction of almost-equal numbers). So choosing a mantissa length of 48 bits is not entirely "pulled out of thin air". the later IEE754 standard bumped this a bit higher, to a 53 bit mantissa in a 64 bit word.
    – alephzero
    Feb 27, 2020 at 17:46
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    I suspect a very big or important customer simply came to them and said they needed more precision. They were making super-computers after all, which meant they were being used for bleeding-edge computation. Sep 9, 2020 at 18:40
  • 1
    Note that the 6600 (and successors) did support a sort-of double precision mode. It used the exponent and mantissa from one word, and only the 40 bits of mantissa from the other to create a 100-bit double. Jan 11, 2021 at 21:42

2 Answers 2


At Ed Thelen's website one can find a pdf copy of "Design of a Computer - The Control Data 6600" by J.E. Thornton (Scott, Foresman and Company, 1970) with a foreword by Seymour Cray. Thornton was "personally responsible for most of the detailed design of the Control Data model 6600 system" according to the foreword by Cray.

On page 13, one finds

The selection of the sixty-bit length was made for efficient instruction packing and for extended floating point precision.

(note that instructions were 15 or 30 bits, so could be packed into 60-bit words).

  • Sounds much like I've been told many years ago.
    – Raffzahn
    Feb 27, 2020 at 22:08
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    An interesting note: if a loop fit entirely within a 60-bit word, it would run without extra instruction fetches after the first. I wrote a compiler back in the '70s that took advantage of that property when possible (i.e., very rarely). Sep 7, 2020 at 21:20
  • I worked for the company Jim Thornton founded after he left CDC, Network Systems Corp. Sep 9, 2020 at 18:59
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    KDF9 also had an interesting short-loop capability. Since instructions were 1 to 3 bytes long and unaligned, there was a two-word (12 byte) instruction buffer from where they were obeyed. Pack your loop in there and it would execute without further fetches from core. There was a "short jump" instruction that took no target address specifically for this purpose.
    – dave
    Dec 4, 2020 at 22:44
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    @RichardHussong, that was true on the 6400 (and the machines that had 6400 CPs). The 6600 had an 8-word "instruction stack" (cache). A loop on a 6600 that fit entirely in the instruction stack would not re-fetch instructions. The various FORTRAN compilers went to a great deal of trouble to make things fit, as well as scheduling data fetches against operation completions. Dec 7, 2020 at 9:51

Three factors come to mind:

  1. Cost is a function of word size.
  2. Performance is a function of flexibility.
  3. Moore's Law

The second point encourages the selection of a 'good' word size. Good, here, means an even multiple of 2, 3 or 5 or a combination thereof. The 'good' choices are 8, 10, 12, 16, 20, 24, 30, 32, 36, 40, 48, 60, 64, 72, 80, 96, 120, 128 and 256.

Having selected 48 as a cost effective word size, one gets a 36 bit mantissa.

Moore's law eventually makes a larger machine feasible.

The next 'good' size after 48 is 60, which results in a mantissa of 48 bits. Unless you are tied to even multiples of 8 bit characters, which CDC was not.

  • It used to really annoy me that the CDC characters were only 6 bits, and couldn't support full ASCII. I wrote a library to convert back and forth from 6-bit characters with escapes to 8-bit characters. Dec 6, 2020 at 5:05
  • I heard a rumor that Seymour considered 64 bits but discovered 60 bits was faster. I've never seen any confirmation of that so I have to assume it was just a folk tale. Dec 6, 2020 at 5:07

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