I am creating a minimal Z80 computer with serial output on a breadboard. I have kind of moved up from the last question, where I was executing instructions on Z80 using specific connection of resistors on data bus. Now I am finally hooking up the Z80 with ROM and RAM chips. Many websites list that the maximum space that the Z80 itself can address is 64K (2^16). I have 32K SRAM chip and 32K EEPROM, so I want to add both chips to the 64K address space, it just fits to the limit, right? Would it be possible to fully operate with whole 32K RAM and 32K ROM without using manual bank selection to determine, which address space part should be used?
I was thinking about using 74HCT139 1 from 4 decoder. I want to divide 64K address space into four parts of 16K. So I will be able to use 14 address pins to address 16K and 2 address pins will be free to use in 74HCT139. Thanks to the decoder I will get 4 signals, which will help me to get into 1 of the 4 address spaces. For this case I would like to use OR gate like 74HCT32. Please see the image below, I tried to express myself through the picture. Each chip (ROM and RAM) has 2 address space parts, which means, that I will be fine using 0 or 1 to determine, which address space part is indeed.
So my question is:
Is my decoding logic valid?