The 6502 series of CPUs has an interesting quirk: indexed loads and stores may perform a "false read", reading from the target address or a different address on a previous page. There are situations, such as code for the Disk ][, where this can be advantageous.
I have two closely-related questions about this...
- What are some examples of how this was used deliberately?
A well-known example is discussed on page 9-22 of Jim Sather's
Understanding the Apple II.
A write to
$C08F,X is used to keep the address on the bus for
two consecutive CPU cycles. Was the feature used for other devices? Why?
- How did CPU behavior change with later CPUs? Put another way, what are the best practices for taking advantage of the feature across all members of the Apple II product line?
Apple used the 6502, 65C02, and 65C816 in its product line, and the false-read behavior changed a bit in the later CPUs. I read that initial versions of the 65816 removed the behavior, but it was restored to prevent older Apple II software from breaking. Apparently the final behavior of the 65816 is actually closer to that of the original 6502 than the 65C02.
I would also be curious to know if the behavior was removed from production chips used in non-Apple products, e.g. if you managed to fit a Rockwell 65C02 (with BBR/BBS etc.) into an Apple //e would disk writes fail.