Although useless, it’s widely known the first Intel and derivate CPUs like the Z80 didn’t set a limit on the instruction size.
Mind to explain what limit you're asking about? There is no instruction on an 8080 with more than three bytes - and no Z80 instruction with more than 5 (*1).
Furthermore, adding multiple/repeated prefixes don't create a longer instruction - just as adding NOPs in front won't do so.
If generally the limit today is 15 bytes, I remember the 286 had a 10 bytes limit…
Should this maybe refer to some (prefetch) buffer limits?
Such buffers only organize the way memory access is interleaved with instruction execution. Instructions can (and often do) cover multiple buffers - that's why the 486 had two 16 byte buffers. Access to various parts of the instruction was done by different parts of the pipeline at different times.
Others, like the 68000 or most RISCs didn't have any buffers but read the instruction stream synchronously with its execution.
Caches have blurred that even more.
But what generally the last CPU from that instruction set which didn’t cap instruction size ?
It seems as if you assume the reverse of the cause and effect. CPU hardware is made to comply to a certain instruction set (for this CPU), thus serving all sizes that are needed, not limiting them.
Further, asking for a 'last' seems to imply a singular line of development, does it? CPUs are defined all the time. There is no singular before and after. Not even within a single company and linage like Intel and their x86 implementations. Strategies for instruction fetch, buffering, decoding and execution have not only changed many times - this includes 'reverting' to something done previously.
*1 - In fact, from a CPU's perspective there is no Z80 instruction with more than 3 bytes, as each prefix is handled as a separate instruction, which is clearly shown by pulling the
M1 signal with prefix and opcode byte.
SS: REP MOVSW, only the last one is handled when restarting after an interrupt. This means that
SS: REP MOVSWtransfers the right amount of data (REP is never forgotten), but from a wrong source, whereas
REP SS: MOVSWperforms just a single
SS: MOVSWafter an interrupt. The 80C86 fixed this issue.