Core has some interesting properties (nonvolatility, high reliability, resilient to radiation) that might make it useful in some situations. I know early versions of the computers on the Space Shuttle used it for some of those reasons, but even the Space Shuttle is nearly half-century-old technology now so it's hardly "contemporary."
"Core memory" comprises three technologies. All disappeared with the introduction of semiconductor memory.
Magnetic-core memory was a nonvolatile, rewritable memory made of wires threaded through ferrite toroid cores. The cores are arranged in a grid, with wires along the rows, columns, and diagonals of the grid. By passing sufficient current through the correct combination of wires, selected cores can be magnetized. The magnetic field remains even after power is removed.
Early versions of this memory had destructive reads (much like DRAM); non-destructive read technology appeared later. Each core requires 3 to 5 wires to be threaded through the hole. Manufacturing had to be performed manually under a microscope, usually by women specially trained in that task.
Per bit, magnetic core memory was cheaper, smaller, and lighter than the vacuum-tube or transistor memory of that era. Aerospace companies also liked its nonvolatile nature and resistance to radiation.
Over 2,000 core memories flew in aircraft or spacecraft by 1978.
The first use of magnetic core memory was the Whirlwind computer in 1951. It was used by various computer manufacturers throughout the 1950s and 1960s.
The Gemini guidance computer used 39 planes (one word) x 64 x 64 of ferrite core memory. Additional programs were loaded from the Auxilliary Tape Memory. (pp. 14-17) This was the first computer with core memory with a non-destructive read (p.25).
Mission control in Houston used IBM 7094-II computers with 65,000 words of main core storage and 524,000 words of additional core as a fast auxiliary memory. (p. 251)
The Mariner Mars missions had a computer with 128 x 22 bits of magnetic core memory with destructive serial readout. (p. 145)
Rewritable memory of the Apollo Guidance Computer was magnetic core memory. Block I (uncrewed test flights) versions had 1 kword, and Block II (crewed missions) had 2 kwords. Words were 15 bits plus one parity bit.
The Apollo lunar module also had an Abort Guidance System. The bit-serial MARCO 4418 computer built by TRW had 2k x 18 bits of read-only cores and 2k of writable cores. Only 20 words of memory were unused. (p. 60)
Skylab had an IBM System/360-derived TC-1 computer. It had 16k x 16 bit of destructible core memory. (p. 68) The final memory usage was 99.7% (p. 74)
The original Space Shuttle general-purpose computers were IBM AP-101. The first Shuttle flight had 104k x 32 bits of core memory. They were arranged in modules that are powered up or down as needed. (pp. 95-97) 35k of the memory was just user interface. One of the computers survived the Challenger disaster, and its core memory was still readable. NASA later replaced these computers with AP-101F, which has 256k of semiconductor memory (pp. 132-133).
Core rope memory was a read-only memory also made of wires threaded through ferrite toroids.
In the erasable memory, cores are magnetized either clockwise or counterclockwise, thus indicating the storage of either a one or a zero. In fixed memory, each core functions as a miniature transformer, and up to 64 wires (four sets of 16-bit words) could be connected to each core. If a wire passed through a particular core, a one would be read. If a particular wire bypassed the core, a zero would be read. For example, to store the data word 1001000100001111 in a core, the first, fourth, eighth, and thirteenth through sixteenth wires would pass through that core, the rest would bypass it.
Like magnetic core memory, core rope memory had to be assembled by hand. However, the latter required even more skill and care, because the pattern of weaving determined the stored code. The code needed to be specified months in advance to give time to weave the memory (pp. 43-44). Errors were permanent and could not be patched. As such, I can find only two instances of core rope memory:
The Mariner Mars probes used core rope memory (p. 149).
The code of the Apollo Guidance Computer was stored in core rope memory. Block I had 24 kwords, and Block II had 36 kwords. Both were arranged in 6 modules.
Plated wire memory was a rewritable memory that could be machine-assembled. Berylium-copper wires are plated in a ferrite material, which forms the columns of a grid. The rows are selected by currents in metallic straps. The region of the ferrite coating around each intersection performs the same role as ferrite cores.
Plated-wire memory is a lot easier to build than core memories. However, it is much more susceptible to misalignment of the components, limiting the density and size of the memories. It has been used on many spacecraft:
The UNIVAC 9000 series used plated-wire memory.
The computer of the Viking orbiters had 4k x 18 bits of plated wire memory. (p. 159)
The computer of the Viking landers had two Honeywell HDC-602 processors, each with 18k of 2-mil plated wire memory. (p. 169)
The attitude control computer (HYPACE) of the Voyager spacecraft used the same 4k x 18 bits of plated wire memory as the Viking orbiters (p. 177). Only two words of this memory were left unused (p. 178).
The controllers mounted on the Space Shuttle engines were originally Honeywell HDC-601 computers. They had 16k x 17 bits of 2-mil plated wire memory. In the late 1980s, they were replaced with a 68000-based controller with CMOS RAM. (p. 130)
The KH-9 HEXAGON spy satellite was reported to have used plated wire memory.
The first computer aboard the Hubble Space Telescope was a DF-224 with plated wire memory. The computer was replaced by an 80486 with semiconductor memory.
Only two core memory using are operational today: the two aboard the Voyager spacecraft. And they are both beyond the heliopause of the solar system. As I write this, the Deep Space Network in Madrid is receiving a signal from Voyager 1.
Semiconductor memories are cheaper, smaller volume, lighter, larger capacity, faster, and less power than core memories. The commercial computer market -- very sensitive to costs -- quickly moved away from core memories. Methods to overcome the weaknesses of semiconductor memories were implemented, such as parity bits, error correction, and redundancy. This allowed their adoption by the aerospace industry. Core memories are no longer manufactured, and there is no longer a workforce with the requisite skills to produce them.
Core has some interesting properties (nonvolatility, high reliability, resilient to radiation) that might make it useful in some situations.
Nonvolatility and high reliability? Not really.
Core memory is notorious unreliable. In the early to mid 1970 one non-correctable error per 32 KiB and month was a good rule of thumb. Mind you, single bits (of a word read) flipped all the time and were corrected in line by ECC.
Projected onto today this give a blue screen every 80 seconds per Gigabyte. Of course we could assume increased quality being developed, making it like two or three magnitudes better. That would reduce the BSOD to "only" one every two hours and Gigabyte. Not really cool either.
One has to keep in mind that terms like reliability are always in relation to application. For a computer with several dozend and up to a few hundred KiB, an error per week or few days isn't a big deal. Especially in an environment where the alternative is not being able to do the work (*1) at all.
So demise of core memory was for sure not about size or weight - mainframe installations didn't care for either - and as well less of speed (*2), as early semiconductor memory was slower and smaller, but due reliability. Of course, once the decision was taken, semiconductor memory development slowly got an advantage.
I know early versions of the computers on the Space Shuttle used it for some of those reasons,
AFAIK the Space Shuttle's computer memories were all semiconductor based. Though, there could be some in more specialized equipment.
Most important here beside reliability and space is weight. No matter how small the cores may be, any reasonable designed semiconductor memory with sufficient shielding will need less space and weight only a fraction.
Equally important, what good is it if the memory is radiation hard without shielding, when all other components of the control system (computer) does need the shielding as well?
So either pack everything into nice metal boxes with decouplers and alike on all ports, or use for RAM the same radiation hardened process as or CPU and other components. Or, well, in reality both at the same time.
Aside from legacy systems, are there any contemporary uses for magnetic core memory?
No, not for core as it has been used back then - that is little rings and three wires. But don't give up hope, there are some modern (*3) attempts to use magnetic effects for storage.
First in line was late 1970s Bubble memory. A great idea, but it never scaled to anything useful beside nice applications - were military and space was one - so essentially a dead end.
During the late 1990s Magnetoresistive RAM (MRAM) was developed. It works quite close like core by storing bits in form of magnetic fields. In fact, basic MRAM even interacts with each bit without transistors, just by a grid of wires and a write line (*4), much like with classic core. But unlike classic core, reading is not destructive, but done by detecting the different electrical resistance for each states, so it doesn't need a refresh after read.
MRAM is quite promising and has reached main stream status with several big manufacturers offering MRAM chips. Actual sizes of 256 MiBit are available and 1 GiBit has been announced. This brings MRAM quite in the range of modern memory needs (*5) - at a price about 10-15 times higher. It's also unlikely that it well get much faster, as executing the magnetic effect is proportional to current and time. So any application will be a balancing between speed, size (density) and retention time.
The other, related branch are Ferroelectric RAM (FeRAM/FRAM/FeFET;*6). Their structure is again much like core (and MRAM), but the information gets not stored in a magnetic field but as an electric. The storage cell can be seen much like a capacitor in a DRAM, except that it doesn't loose it's charge (*7). And like said capacitor (and rings in core) it looses it's content when read. It's as well related to FLASH, which also uses an electric charge, but needs more elements wich translates to larger size. This in fact makes FeRAM a good candidate to challenge FLASH, by allowing higher densities as well as higher speeds (*8).
For use as RAM, FeRAM is rather slow, only able to operate up to maybe 20 MHz. But there is a good chance of improvement past that, especially with a CPU interface taking account of the specialities of FeRAM, like write after read (*9). FeRAM has today many embedded applications for fast writable persistent storage, avoiding the hassles (and low endurance) of FLASH.
FeRAM's most known, as well as widespread usage in popular computing may be Sony's PS2's SoC. It contained, beside MIPS-CPU and 'a few' other parts, a 4 KiB FeRAM section. Not much, but sold in more than 150 Million units :)
More to Come
The idea to store fast and direct access data durable, using physical properties, isn't dead at all. It will just need to find a way to gather the investment to bring it ahead or at least on par with DRAM and FLASH.
(Here's a short comparison between MRAM and FeRAM)
*1 - When talking about early applications (which means different machines at different times for different areas) the most important point is that it wasn't about details we think today, but the simple fact of being able to automate the process. A Zuse Z4 or DEC PDP-8 wasn't so much about the number crunching as being able to automate and produce (and reliably reproduce) a process without human interaction. Speed was just a bonus.
*2 - A 1970 IBM /370-155 had a memory access time of 2 microseconds delivering 16 ECC corrected bytes per request.
*3 - Modern in sense of new implementation and wide spread application, as all of the following usages and have already been proposed at times when classic core was still a thing.
*4 - There are as well variants with a transistor added per bit to reduce currents, which reduces size, but as well speeds up writing - the speed/current/size part is the main focus on development here with methods like 'Spin Transfer' and local heating.
*5 - Fastest MRAM I know is Everspin with a DDR3-1066 interface operating at 8-8-8. So quite usable for a office machine. Still anywhere between 2 and 10 times slower than DRAM is (can be).
*6 - And related Ferroelectric Field-Effect Transistor RAM (FeFET) will come up, but that's essentially a variation of FeRAM with a transistor per bit, quite like done with MRAM. So I would not consider it a different technology.
*7 - Well, it does, but in term of decades instead of miliseconds.
*8 - In the long run that is, as FLASH has still the advantage of higer integration and especially recent developments of storing multiple bits per cell, which outwights it's larger size by far.
*9 - Which BTW is much what mainframes did with core. For example the /360's atomic TS (Test and Set) instruction, essential for multiprogramming and multiprocessor applications, worked as part of the read and refresh cycle of core. It was effectivly the memory unit doing this, eliminating any need for synchronizing hardware or locks :)