The PS/2 keyboard protocol allows the keyboard to generate a clock rate between 10 kHz and 16.7 kHz.

At 11 bits per scancode, 10 kHz is a massive 909 scancodes per second. World-record holder Barbara Blackburn peaked at 216 wpm ≈ 18 cps ≈ 54 scancodes/sec. on a Dvorak keyboard layout. Even with punctuation and modifier keys, there's still a ton of budget available.

Did IBM provide any reasoning for the chosen frequency?

References checked

I skimmed through the PC AT Technical Reference (1984), but had no luck. Checked the PS2 Hardware Interface Technical Reference (1991), and found this nice timing diagram on p230 mentioning "30–50 µs" clock timing parameters - a period that matches exactly the frequency range of 10kHz–16.66 kHz. I see no mention of why, though.

Timing diagram for PS/2 CLK and DATA lines

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    I have a BTC5349 from 1989 (serves as a macro keyboard), and I have measured the actual "baudrate" to be close to the standard (modem) baud rate 14,400 (about 14,700 baud, 2.3% deviation), probably not a coincidence. I used Sigrok (open source, Linux/Windows/Mac). Screenshot Jul 13, 2020 at 13:05
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    Pushing together gear that was never meant to work together requires serious chops, and historic computing is not easy just because it’s old. Reading further it appears you are only dabbling, and skill/experience on 6502 is a factor. As such, this seems like a grumble, gripe and/or vent... to put it lightly, that’s not really SE’s format here... Jul 13, 2020 at 16:23
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    More a site rule that questions shouldn’t be rants/gripes. Jul 13, 2020 at 16:55
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    216 WPM is the sustained world record typing speed. Burst speeds can be considerably higher -- for example, back when I was using IRC over dialup, my login sequence clocked in at well over 300 WPM.
    – Mark
    Jul 13, 2020 at 21:42
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    That sounds suspiciously like half of 32768 Hz which was an easily obtained and cheap crystal frequency, because it was used in early digital watches. Dec 4, 2020 at 1:50

5 Answers 5


Why is the clock frequency of the PS/2 keyboard protocol so high?

I wouldn't call it high. It's quite in line with similar keyboard speeds - like Amiga operating a 17 kHz.

At 11 bits per scancode, 10 kHz is a massive 909 scancodes per second. World-record holder Barbara Blackburn peaked at 216 wpm ≈ 18 cps ≈ 54 scancodes/sec. on a Dvorak keyboard layout. Even with punctuation and modifier keys, there's still a ton of budget available.

While typing speed - and more important delay time (aka keyboard lag) - defines a lower boundary for a useful keyboard interface, it provides no argument for an upper limit. To keep latency low, the highest reliable speed is to be preferred.

But there are several issues with the number used. For one, actual English language records, using computer keyboards, are past 300 word/min or 25 char/s, which would mean 75 scancodes/s using above equation. That's already past a one per frame as many early computers did scan and past what can be done on a genuine IBM PC.

More important, the whole argument is at error, as average typing speed is exactly that, average. Levelled out over several minutes. Certain combination can be way closer to each other. Think of combinations like 'er' wich are more like a single move.

So a keyboard able to handle fast writers should go well past these number. At least double it, meaning 150 scancodes/s would make a good lower end for transmission speed. With an 11 bit word that's a 1,650 bit/s ... of course any controller will need some time to feed it, so selecting a value 2-3 times of that is applicable. It's obvious that we already get close to the 10 kBit IBM defined as lower limit.

On the PC the speed is defined by what the 8048 controller within the Keyboard can deliver, as the receiving side was a 74LS322 shift register, good for some Mbit instead :))

On the AT it was what the microcontroller in the keyboard and mainboard could do without any issue - that's BTW why there is such a wide range of 10..16 kHz, as it allows them to operate at less reliable clock sources as well.

Having recently bit-banged the PS/2 protocol on a 1MHz 6502, I feel like it sure would have been easier on keyboard port implementers if IBM had decided on a lower frequency, so we could have had some time to decode the protocol inside my interrupt handler, instead of offloading it to a circular buffer.

Why should IBM have cared about any implementation different from their own?

Did IBM provide any reasoning for the chosen frequency?

It's an obvious choice, and AFAICT artificial slowed down. In a setup with a HW shift register and a microcontroller (IBM-PC) or two microcontrollers (PC-AT), 16 kHz is a quite low rate, kept in a range of easy detection and leaving lots of room for slow controllers.

  • The 1MHz clock speed and VIA pins A5-7,B0-7 are specified by the kit I built this out of. I found I already have plenty of cycles in NMI to handle the extra rotates. But I definitely need to use indirect addressing instead of the X register; I simply forgot the 6502 is capable of that addressing mode! Jul 13, 2020 at 0:20
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    Let us continue this discussion in chat. Jul 13, 2020 at 3:54
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    I think it should be considered that the PS/2 protocol is not limited to keyboards, but is also used for mice, graphic pens etc where a higher speed may be necessary. Jul 13, 2020 at 7:28
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    @rexkogitans I was thinking of barcode scanners that work by emulating a keyboard - or remember how the Alphasmart keyboards similarly worked (by sending keycodes as fast as possible down the PS/2 or ADB line), I wonder if that factored into the design of PS/2 too.
    – Dai
    Jul 16, 2020 at 0:56
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    @Dai Well, as soon as there is an interface, there will be use. Most well known example for PS/2 (in the US) might be the CueCat. Still, while I do belive they thought about other uses, it's clearly more of a one function interface - otherwise they would have gone for a bus solution like Apples contemporary ADB - instead of doubling it for keyboard and mouse.
    – Raffzahn
    Jul 16, 2020 at 15:25

The user will perceive a delay (latency) between pressing a key and seeing the computer react.

The reactions are usually on its screen, such as displaying a typed character or motion in a game. This delay must be kept short for the user to have a feeling of sharpness in the computer's reactions.

The delay is the sum of:

  • (a) the keyboard scanning interval and debounce period
  • (b) the data transmission time
  • (c) the computer software processing time

The keyboard scanning interval was originally 3 ms in these PS/2 keyboards. At least two scans are necessary to detect a key and debounce it, so (a) is at least 6 ms. (The PS/2 keyboard may use 3 or more scans before sending a key make/break code, it's been a long time since I read the keyboard microcontroller software disassembly.)

The keyboard clock frequency and 11-bit packet length puts (b) in the order of 1 ms.

The computer reaction time (c) depends on the application and is the variable sum of many elements. For example, if the display is scanned at 60 Hz, there could be up to 16 ms between the CPU attempting to display something and it appearing on the screen. But with games using schemes like double and triple buffering, (c) becomes a subject in itself.

So it is necessary to use a reasonably high keyboard clock to keep the overall latency down and produce a sharp response to keypresses and activity.

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    It's worth noting that overall computer latencies have been going way up over the years. Those early computers were surprisingly snappy. Dec 4, 2020 at 1:52

Until communications frequencies get fast enough to cause difficulties, communicating at higher speeds is no more difficult than at lower speeds. It sometimes makes sense to use a speed somewhat slower than the speed one expects to be able to handle easily and reliably, in case things don't work quite as nicely as planned, but the AT protocol used in the PS/2 is nowhere near the upper limits of what such protocols could use.

A more interesting design issue comparing the AT keyboard signaling versus the XT is that the former requires that an attached device be ready for data to arrive at any arbitrary time, whereas if memory serves the latter lets the computer decide when it wants each bit of data.

  • Great points. The other peripheral buses I’m familiar with (ADB and low speed USB) both use the host polling model as well. Jul 13, 2020 at 17:02

The PS/2 keyboard protocol allows the keyboard to generate a clock rate between 10 kHz and 16.7 kHz.

As far as synchronous communications go, this is not fast at all. Even the most rudimentary serial-to-parallel converter solutions could cope with MHz clock rates, and if you wanted a PS/2 interface that could deal with 1MHz clock rate, it'd need an internal FIFO but there was support for all that in the TTL databook, so not a big deal. A 16kHz clock rate is extremely slow, I'd say, at least from the point of the digital logic at the time.


Typematic Rate

Entering text is not the sole purpose of a keyboard. Anyone who played games would recognize the desire to be able to hold down a key for continuous, fine-grained inputs during gameplay. Even someone with a text editor would want to navigate the editor quickly with arrow keys. Being gated by the speed of the average typist would be an unnecessary and frustrating limitation.

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    Key repeat is a feature of the computer, not the keyboard. The PS/2 simply sends a "make" code when the key is pressed and a "break" code when it's released, and it's up to the software to decide what to do in response.
    – Mark
    Jul 13, 2020 at 21:51
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    @Mark: Historically, it was a feature of the keyboard. Newer versions of Windows may decide to ignore repeated key-down events from a PS/2-style keyboard and generate their own keyboard repeat events so as to allow maximum control over key-repeat speed, but in the DOS era, applications would receive repeated key events at whatever rate the keyboard sent them.
    – supercat
    Jul 13, 2020 at 21:57
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    @Mark This source says otherwise: www-ug.eecg.toronto.edu/msl/nios_devices/datasheets/…. Also, if the keyboard is irrelevant for typematic behavior, please explain why the DOS MODE command says that "some keyboards do not recognize this command", and note that this command calls a BIOS function to send the controls to an AT-style keyboard: info.wsisiz.edu.pl/~bse26236/batutil/help/MODESTRS.HTM Jul 13, 2020 at 23:35
  • Doom uses keyup events: github.com/id-Software/DOOM/blob/… Jul 14, 2020 at 3:15
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    Typematic is a hardware feature, but it is too slow for quick-response games. Game developers track which keys are held down, using the make/break codes at the start and end of key events. Jul 16, 2020 at 14:31

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