The Intel 8087 supported both single and double precision floating point, but only in memory; the on-chip registers were purely double precision. (Strictly speaking they were actually 80-bit extended precision.) The same is true of the Motorola 68881, designed at almost the same time. Nor was this design decision exclusive to microprocessors, or to scalar machines; Cray vector supercomputers of that era had vector registers of double precision operands.
By contrast, the later SSE2 instruction set has registers that can be treated as four single precision operands or two double precision, i.e. you can put a pair of single precision operands into the space that would've been occupied by a double precision operand. And as far as I can tell, this is typical of modern floating-point architectures, both CPU and GPU.
Why the change?
Is it for the technical reason that we now have enough transistor count to build SIMD vector units (as distinct from the Cray supercomputers which had vector registers but a scalar FPU) and that layout makes more sense for SIMD?
Is it for the business reason that nowadays graphics and machine learning provide important workloads that actually want single precision?
Or some other reason I haven't thought of?