9

I've wired up a simple Z80 circuit, and I've encountered a strange issue: after successfully executing one instruction, the M1 cycle of the NEXT instruction never completes successfully.

Here are some facts:

  • I can execute indefinitely many M1-only instructions (such as: NOP, INC r)
  • As soon as an instruction which has an M2 cycle as well (such as JP nn), only the FIRST such instruction is executed successfully; a second one enters a "corrupted" M1 cycle which never finishes.

My test setup

  • manual clock, using a Schmitt Trigger to clean up the edges; this is reliable, as I can accurately move from one Tstate to the next
  • Hard wire 11000011b (0xC3) on data lines; this is intended to run as JP 0xC3C3. Z80 manual says this is a 10-clock operation (4, 3, 3)

My reproduction steps

  • Verify 0 on A0-A7 (to fetch opcode byte)

  • Run through M1 (4 clocks) and compare successfully to spec timing diagram at each clock cycle

  • Verify 1 on A0-A7 (to fetch first byte of operand)

  • Run through M2 (3 clocks) and compare successfully to spec timing diagram at each clock cycle

  • Verify 2 on A0-A7 (to fetch second byte of operand)

  • Run through M2 (3 clocks) and compare successfully to spec timing diagram at each clock cycle

  • Verify 11000011 on A0-A7

(At this point, since C3 is present on A0-A7, it proves that the CPU has executed the first JP 0xC3C3 successfully.)

  • Verify output voltages correspond to beginning of M1
  • Try executing the second JP 0xC3C3
  • Failure: partway (T3 high clock) through M1, output voltages no longer match Z80 spec's M1 timing diagram and CPU is stuck in a repeating pattern.

I am able to reproduce this every single time I run this test. First JP nn is always successful, second instruction fails.

Any help is appreciated; I've spent hours measuring and trying things out, but this issue has me beat :(

My thanks in advance for any help at all!

The observed timing of second instruction

Here is the timing I get, from the start of the second JP nn. My timing matches the spec timing only during T1 and T2. enter image description here

6
  • 2
    What kind of Z80 do you use? The NMOS version (no C in the model number) is specified at a minimum clock frequency of 250kHz. (2µs clock low max + 2µs clock high max => 4µs period time max) Your single stepping will be way below that. The CMOS version is specified for arbitrary low clock speeds (maximum clock high/low time is specified as "DC"). Sep 26 '20 at 22:18
  • 1
    Thank you for the reply. It's a Z84C0020PEC, which is CMOS, according to link.
    – newbie21
    Sep 27 '20 at 0:29
  • 6
    The verdict is in. After more hours of trials, I found that the CPU was damaged, either by me or DOA. It's an interesting error state, since whatever circuitry is in charge of M1 goes into an undefined state after M2. But if M2 is not needed, M1 can execute successfully indefinitely. Another difference I see now is current draw: the bad CPU drew 190mA and a good one draws 70mA with the exact setup. The type is Z84C0020PEC, CMOS. When I started down this path, I did buy multiple Z80 in anticipation for issues like this :)
    – newbie21
    Sep 27 '20 at 2:21
  • 5
    A CMOS CPU by itself should draw microamps, not milliamps when you single-step it. The 70mA is OK if you measure your whole circuit and you have some LEDs in it, though. If a CMOS chip that does no "work" (like a CPU without clock) draws more than a couple of microamps, something is wrong. Most likely causes are: An open input (connect every input to either ground or +5V!), insufficient capacitance on the supply line, or ESD damage. Sep 27 '20 at 7:12
  • 5
    Make your finding an answer, and mark it, please, if you consider it worth to be kept. Think as someone looking for help in a similar situation. Else delete it. Sep 27 '20 at 11:41
8

In the comments you say:-

Another difference I see now is current draw: the bad CPU drew 190mA and a good one draws 70mA with the exact setup. The type is Z84C0020PEC, CMOS"

I bet you have a 'fake' Z80, ie. a relabeled NMOS version. Ask me how I know!

NMOS Z80s are not fully static, so you cannot clock them manually. 190 mA is a normal current draw for NMOS Z80.

2

The verdict is in. After more hours of trials, I found that the CPU was damaged, either by me or DOA. It's an interesting error state, since whatever circuitry is in charge of M1 goes into an undefined state after M2. But if M2 is not needed, M1 can execute successfully indefinitely. Another difference I see now is current draw: the setup with the bad CPU drew 190mA, while a setup with a good Z80 draws 70mA. The type is Z84C0020PEC, CMOS. When I started down this path, I did buy multiple Z80 in anticipation for issues like this :)

2
  • Please explain what you mean by third reply. Yours is only the second answer to the question. Note that comments are not answers and are not expected to be permanent.
    – Chenmunka
    Sep 28 '20 at 15:03
  • My bet is that the "damaged" CPU will work just fine if you run it at a clock of 250kHz or higher: you probably have a fake, and it's an NMOS part, and won't run static. Most people's applications are not sensitive to NMOS vs CMOS, so people buy fakes and won't know. But if you try to single-step the way you do, NMOS won't work, and the behavior IIRC is exactly as you describe. Dec 1 '20 at 6:00

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.