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I have a SYM-1 with the following memory configuration:

enter image description here

How much memory is that? Those all appear to be L2114UCE chips, which are described as "Static 1024x4 NMOS RAM", but I'm not sure how to read that "1024x4". Does that mean 4KB each, meaning that this is a 64KB system?

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    Just a tip for you larsks, on stack exchange it is quite normal to wait a day or two before accepting an answer. Apparently this practi leads to more good answers being posted in that time. – OmarL Feb 2 at 18:54
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Those chips are 1024x4, meaning 1024 locations, each holding 4 bits. They could be arranged two by two for an 8 bit computer.

In the past, there existed 12-bit computers, 36-bit computers and other weirdos, so memory chips were commonly made narrower so that you could build them together for your particular data width. Even 1-bit RAM wasn't unusual. This is what the "x4" means. It's 4 bits per memory location.

The very similar chip, MM2114N is used in the Commodore 64 for the Color RAM, a region occupying 1 kilobyte, but only the lower half of each byte actually gets stored.

From what I can see, you've got sixteen of them, which could logically be 8 kilobytes.

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  • x4 was, in ye olde times, always the second type made when a new generation was introduced. RAM sizes grow naturally by 4 with each Generation (like 4,16,64,256 KiBit). While the x1 type was introduced first and (usually) require new development, x4 types were introduced later to support cost reduces designs. Which is simple as addressing behaviour is exactly like the previous generation, so no changes necessary while the 4 data lines behave exactly like from 4 chips before. Cost reduction comes from one newer generation chip costs less than 4 older. Examples are C64C and C128DCR. – Raffzahn Feb 2 at 18:54
  • @Raffzahn were other sizes commonly available also? For something like a PDP-10 or something, a 9 or 6 bit chip would be quite good. Or even 2 bits. Or do you think it would just have been more economical to just waste a few bits per location? – OmarL Feb 2 at 19:00
  • OmarL, I think there were a few x2 chips, but they are, much like the 32 KiBit DRAM used in some Spectrum, an oddity outside the system. Neither x6 nor x9 made (back then) much sense. wider data sizes only make sense when it's about reducing hte chip count, which in turn is only a thing for embedded or limited size machines. If it's about delivering as much memory as possible, wider data bus sizes would rather result in higher cost as a x4 needs more pins (2) than a x1. With x1, any bus width can be made - while having size maxed out. And that's what minis and top end users need. – Raffzahn Feb 2 at 19:14
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    @OmarL It's the 32 Ki size, an odd (15) power of two. For one, increase in size follows a fourfold between generations, always resulting in an even number of address bits. Second, (classic) DRAM even more prefers even number of address bits, as they are multiplexed. No sense to waste one 'half pin'. So 32 Ki sized RAMs were a very special cost reduction measure, available only in a very short time window. So they are an oddity my all measures. – Raffzahn Feb 3 at 19:49
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    @Raffzahn it matters in the sense that it explains the reason of the anomaly and is not a violation of the "grandiose scheme of things". There could also be other reasons to "violate" that rule, like using two dice instead of one, as was done in the Apple ///. It also gives an insight in the corporate culture of the company, penny-pincher Sinclair vs expensive Apple. – Patrick Schlüter Feb 5 at 8:30
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1024x4 means 1k long (so 10 address lines) by 4 bits wide, so you need 2 chips to make 1K bytes. Typically one would be for the high 4 bits and the other for the low 4 bits.

So you have 8K bytes of memory here

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