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This question occurred to me while I was formulating this answer about arithmetic versus logical shifts.

The IBM 709, and its descendant the 7090, etc., is a 36-bit mainframe with a classical single-accumulator architecture, word-addressed memory, and so on.

Unusually (or so it seems to me), the accumulator is slightly wider than the word size: it is 38 bits rather than 36 bits.

Where a memory word is considered to have a sign bit S and 35 magnitude bits (1-35, with 1 being the MSB), the accumulator has sign bit S, and bits Q, P, and 1-35, with Q and P being "to the left of" bit 1. Incidentally, this nomenclature shows the downside of adopting big-endian bit numbering.

The extra bits provide the benefit of explicitly retaining information that overflows from addition and subtraction operations. Neither bit P nor Q is "the" overflow indicator; the overflow is set as bits pass in or through P -- the temptation to look at this as just a odd way to regard condition codes does not seem to me to work out.

However, the extra two bits in the "middle" of the accumulator means that the instruction set distinguishes loading the AC with an arithmetic value from loading AC with a logical (unsigned) value. The former copies the memory word into S and 1-35, clearing P and Q. The latter copies it into P and 1-35, clearing S and Q.

Anyway, to get round to the question: apart from the 709 and its 7-series offspring, were there other systems that had registers "slightly larger" than memory words? Any non-IBM systems?

Here I use "registers" in the modern sense, as being logically a part of the CPU, and distinct from memory.

I want to exclude computers that support multiple operand lengths -- e.g., a 32-bit machine with 32-bit registers that also has 16-bit arithmetic, and computers with double-length registers for supporting (for example) full-word multiply with a double-length result.

It's the "couple of extra bits" aspect that intrigues me.


Addendum:

This paper on the design of the IBM 701 discusses the decisions leading to extending the accumulator by two bits (see p 1270).

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  • Do the extra bits need to extend data in a regular way, like the P and Q bit (but unlike the S bit)? If not, I guess there's a few example where registers get "tag" bits with additional functionality. E.g. in the Mill, in some Lisp machines, and maybe even in some Burroughs machine (though I'd need to look that up). And there's the reverse case, where you have registers intended for addressing that are smaller than the acc. register size, and loose bits when transferring from acc or memory.
    – dirkt
    Feb 26 at 6:54
  • I'd consider tag bits on a case-by-case basis, I had not thought of that. For address-holding registers, I'd say 'not', they're just a consequence of address size being less than word size. Feb 26 at 12:39
  • @dirkt - don't know about the Mill but in the Lisp Machines (LMI, Symbolics) the tags were stored in memory so "registers" (such as they were, for the microcode, not usually for the user) were the same length as memory in that case. AFAIK.
    – davidbak
    Feb 27 at 19:13
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    The 704 doesn't count, it's not a computer, it's an "electronic data-processing machine", at least that's what it says on the manual :-). But yes, the 704 has the same P and Q bits in the ACC. Thanks. Not sure how I missed that in my question. The 701 also has P and Q, so it looks like an established feature of the 7-series machines. Mar 2 at 0:37
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    The 701 led me to an interesting paper - see my latest edit. Mar 2 at 1:27
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The PDP-8's link bit is effectively the 13th bit in the accumulator. In practice it works as a carry bit, the shift-in bit for rotations, and a general purpose flag.

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  • Hmm, interesting. I'll look into that. Feb 26 at 16:48
  • I'd disagree, the link bit in the PDP-8 is not different from, say, the carry bit in the 6502 status register, or probably the carry bit in most CPU architectures. In the IBM 709, the P bit can be loaded from and stored to memory directly, as part of the accumulator register. That's the important difference.
    – dirkt
    Feb 27 at 9:17
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    The Link bit is different from a carry bit. If an addition overflows, the Link bit is complemented, but a carry bit is set in that scenario
    – OmarL
    Feb 28 at 8:29

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