In those days, there were few if any computer-aided design tools. IC design work was done by hand, up to and including the preparation of photolithography masks using a scalpel and a steady hand. These were then photo-duplicated at a reduced size for application to the actual manufacturing process.
In the 1970s, the main technologies suitable for building microprocessors were LSTTL (using bipolar transistors) and NMOS (using resistors and field-effect transistors). The 6502 benefited from what was then a very new innovation in NMOS by MOS Technology, using depletion-mode transistors as the high-side biasing element instead of resistors, which saved a lot of die space and improved efficiency; this was improved further by the use of "dynamic logic" in which the biasing element and the pull-down transistors that actually implement the logic are not switched on at the same time, but only in alternate halves of the clock cycle. This technology was not available to the first versions of the 8080 or 6800, which were its main contemporaries. It may have been used in the 8086 and the 68000.
The 6502 was overall a major exercise in cost-performance optimisation, with the objective of reducing the transistor count and (particularly) die size to a point where the yield was high enough to permit a low sales price, yet still with a profit margin. For this purpose, about 5000 transistors was considered the limit, about half that of the 6800, and many times less than the 68000. There is no room in such a budget for niceties like a carry-lookahead adder, and a clever (patented) trick was needed to even squeeze in the Decimal mode of the ALU.
Instead of a large microcode ROM containing a separate row for each opcode, a series of smaller ROMs was used to divide each instruction's function into distinct, independent parts. ADC instructions with different addressing modes, therefore, would all decode to the ADC row in the ALU microcode ROM, but different rows of the addressing mode microcode ROM. This both saved die space and reduced the chances for errors in microprogramming. It also resulted in the 6502 having a comparatively orthogonal instruction set for its class (certainly when compared to the Z80 or 8086), making it easier to code for.
You can explore all the gory details at Visual 6502.
In the 1980s, there was a definite shift towards the more power-efficient CMOS technology, which had previously been very slow. It was found that reducing the thickness of the gate oxide in the individual NMOS and PMOS transistors sped them up a lot, at the expense of the maximum voltage they could tolerate. Since older CMOS could tolerate over 12 volts, a reduction to 5 volts was no problem and allowed easier interoperability between CMOS and existing LSTTL/NMOS logic. Most of the popular NMOS CPU families gained CMOS versions, often gaining more functionality in the process since the logic had to be completely redrawn in any case.
CPUs as complex as the 68030 were still hand-drawn for lithography, the blueprints being laid out in large rooms with engineers literally crawling over them to work. There was some movement towards using computers to assist the design process in the mid-1980s; for example Acorn used their existing BBC Micros to simulate various aspects of their new ARM CPU, to verify their correctness and ensure the proposed instruction set was actually usable. This resulted in the first ARM1 prototype arriving from the foundry and working first time - which was virtually unprecedented in CPU design history. The industry took notice of that.
Incidentally, the ARM1 also still used a ripple-carry adder, which was still sufficient to do a 32-bit addition in one cycle at a modest clock speed. Something more sophisticated was implemented for the ARM2, which also added a hardware multiply instruction.
One technique used then, but which is no longer viable today, is the installation of a small-scale chip fabricator in the design offices of some manufacturers. This allowed prototype chips and individual microcircuit experiments to be carried out without interrupting the mass production lines at the main fab. It was extensively used by Commodore after they bought MOS, including specifically for the design of the VIC-II and SID.