On the Commodore 64, there is a 12 bit datapath between memory and the VIC II: the ordinary screen data, which is in DRAM, and another 4 bits which comes from another SRAM chip which may be paged into the CPU's address space. This area contains colour information.

It's occurred to me that exactly the same could be done on the ZX Spectrum, so that the ULA, or whatever hardware generates video, could get at both pixel data and attributes quicker. That could mean not needing to slow the CPU down. Or it could mean being able to use a slower DRAM for cheaper. But it would mean needing another 8 bit wide memory. Maybe a couple of 2114s or something.

Is there any ZX Spectrum or clone that works this way?

  • 4
    It would most definitely need additional RAM chips as well as multiplex hardware, both considerable increasing cost, not exactly what Sinclair, nor any of the clones had in mind.
    – Raffzahn
    Apr 18 '21 at 18:11
  • 2
    The regular Spectrum fetches video in four-byte chunks, rather than two — in each eight cycle window the contended area provides for one CPU access plus two columns of video data to be read, which are fetched back-to-back. So I guess you could go up to a 32-bit bus before changing too much else in the video generation. Otherwise: the Pentagon is a clone without contended pauses, but I don’t know how it is designed.
    – Tommy
    Apr 18 '21 at 19:55
  • 3
    The only (8bit) machine I know of that did something like that was the belgian DAI Computer. It split its 48K RAM address range in 3 16K areas of which the 2 upper third one were shared with the video generation logic. The video accessed the memory 16bit wise, the CPU (8080A) 8 bit wise. This allowed the machine to have much better graphic resolution than any contemporay machine (335x240 16colours). Apr 19 '21 at 6:26
  • @Tommy Pentagon simply runs DRAM at 3.5 MHz, cleverly interleaving CPU and video accesses. It is known that Z80 might only sustain 1 memory access per 3 clocks, so out of every 4 accesses per character (at 3.5MHz DRAM access rate) at most two might be consumed by CPU. The other slots per character (minimum 2 of them) are available for video fetches (1 pix byte + 1 attr byte).
    – lvd
    Apr 19 '21 at 15:44
  • 2
    @Tommy yes indeed, there's a simple "scheduler" that gives to the CPU one DRAM access slot per every CPU memory request. During all other 'free' slots the video constantly refetches an infinite sequence of pixel-attr-pixel-attr-etc. bytes, putting results in separate temporary buffers. When a new character (pixel byte + attr byte) is to be displayed, that temporary buffers are copied, respectively, into shift register and attribute buffer, and addresses for subsequent fetches are updated. The CPU request temporarily holds that infinite sequence of fetches for 1 access slot.
    – lvd
    Apr 19 '21 at 17:58

There is a Spectrum clone, namely ATMTurbo, that uses 16-bit memory bus. However, 16-bitness of memory is only used in extended video modes of the machine, including text mode, 320x200 16bpp mode and 640x200 hires (1 attr byte per 1 pixel byte) modes. In legacy 256x192 ZX mode, only 8 bits of memory bus are used to fetch video.

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