It is important to keep in mind that ARM instruction sets, as defined by ARM, are just that, definitions, not implementations. While ARM does provide templates, manufactures do their implementation independent of each other and ARM. So anything not defined by ARM is implementation and chip specific and may change even within the same manufacturer and type in follow up versions.
First it might be useful to remember that this is neither an official ARM table or naming, nor a default ARM core, but a third party compilation for the GBA's custom ARM7TDMI implementation (*1)
Beside that the distinction is rather obvious encodings marked with
- unpredictable are redundant encodings, while
- undefined mark simply what it says, instructions that have (at that time) no function assigned.
The unpredictable are all encodings of the ADD/CMP/MOV group meant to access the 'higher' registers (R8..15) with both high bits zeroed, making them work between lower registers (R0..R7) only. These are simply redundant to regular ADD/CMP/MOV (*2).
Within ARM manuals, they are all Undefined. (*3)
For these instructions it's up to the implementation if they get translated into their counter parts, like early Thumb implementations did, or not.
Since they were defined by ARM as unused, they could and did redefine them - like with ARMv5 for MOV. The redundant MOV was made not only made a real opcode, but changed in function as well. The high register versions of MOV are now copy (CPY) instead of move - meaning no flags are touched.
Maybe that's why the authors of that table marked them as 'unpredictable'
The undefined in contrast are simply the remaining encodings that have no assigned function. As well Undefined in genuine ARM documentation.
Like with all undefined behaviour, they may or may not have some working depending on silicon and their workings may not only change between manufacturers, but as well between chip versions - not to mention assigning functions in later designs. For example the undefined version of BX (*4) was turned into BLX with ARMv5.
Beside these clearly marked as undefined, there are some other instruction set holes: Wherever a field is marked as (SB)Z - all encodings other than zeroes can (and will) be used for future extensions.
P.S.: Have you already tried to ask that on SO, which might be a more appropriate audience?
*1 - An easy visible oddity is that this table includes all 16 conditions for 8 bit relative branches, whereas Thumb excludes always and never (14/15) - with never later (v5) be redefined as software interrupt.
*2 - Check the line right above each.
*3 - With a capital 'U' :)
*4 - Interestingly called unpredictable in the ARMv5E Architecture Reference Manual.