My experience growing up was that my Dad would program 'EEPROMs' or Flash ROMs from his Apple IIGS. (I don't know if that is similar to an FPGA or not). He used these in custom wire-wrap computers he was building (around 1986-1989).

We know that the first FPGAs went on sale in 1984.

I've just finished reading Charles Petzold's book, Code: The Hidden Language of Computer Hardware and Software. In it Charles explains building relays into gates, gates into logic components, and logic components into computing machines.

He talks about the book TTL Data Book for Design Engineers which first came out in 1973. (I'm assuming people had lists of TTL gate chips prior to this). This talks a lot about the Texas Instruments 7400 series of logic gate chips.

Now to me it seems you could combine TTL chips (or relays or transistors) into a CPU using the instructions in this book. But everything online says "use FPGAs instead! It's easier for that scale! [Unless you're getting the concepts and want to see the end to end view]". Fair enough - some pragmatism is good - it depends on what the outcome is.

When you look at the structure of an FGPA - it appears to only have slightly more complexity than a 4-bit adder.

enter image description here

Now I don't know when the first four-bit adder was invented. (My guess is it came out of Claude Shannon's work on boolean logic in 1948).

So somewhere between 1948 and 1984 someone must have thought of the idea of FPGAs.

Assumption: By "people" I mean any hobbyist or engineer who is not explicitly prototyping the next FPGA to be manufactured by Naval Surface Warfare Center, Altera and Xilinx.

My question is: Were people building FPGAs out of TTL logic prior to the first sales in 1984?

  • 9
    The question is somehow backwards. People weren't "building FPGAs", it's the other way round: FPGAs were used to replace lots of random TTL logic, because it was cheaper that way. You can see the difference e.g. between the Apple II and Apple IIe: The Apple II used TTL chips for the video logic, the Apple IIe consolidated most of that into a custom chip.
    – dirkt
    Jan 6, 2017 at 6:12
  • 3
    What you see on the picture is not an FPGA but a very small part of it: one configurable logic block. An FPGA consists of a matrix of those plus a configurable routing network (see the rightmost red circle hinting to that), plus the configuration circuitry (not shown at all). Building an FPGA out of TTL logic doesn't make sense.
    – Leo B.
    Jan 6, 2017 at 20:34

4 Answers 4


Yes at one level we did do designs in TTL but usually not the whole structure of an FPGA. From memory I'm pretty sure that the QL ULA was wire wrapped first (I worked with David Karlin the QL designer) usually the problems were mostly to do with the signal timings due to longer wire lengths when you did stuff in TTL (I'm ignoring power and heat for this discussion).

At the sort of time period you're talking about I suspect most folks used things like the AMD2900 for custom CPU designs (the wikipedia page goes into a long list of designs)

In 1988 when I worked with David on a Ethernet chip design (a chip called ENZO) we breadboarded the data separator in TTL. Later (1990..2) we did initial prototypes of designs using Actel chips and I did a 80286 based support chipset design for an embedded system with most of an AT system built in (I skipped DMA as it wasn't needed) in a single part.

We ran out space when I did a networked chip for a mixing desk (1983?) (not that big IIRC less that 10000 gates) but we prototyped it in sections disabling bits of logic to gain enough space to test with. The Actel parts were the biggest available and the main logic block was 4 input mux followed by a latch. (Muxes make great logic gates you can do nearly all four input logic gates with one) They were very expensive at the time (I have a figure of £400 in my head which was probably over $1000 at the time) You could make a 4 bit gray counter out of 4 LUTs which I was rather pleased with. We didn't use Verilog/VHDL as you could beat it by hand fairly easily (also the designs were small enough to work with at the gate/latch/flipflop level).

We used a Toshiba sea of gates technology for our production ASICs a bit more flexible than a ULA but along similar lines.

In 1984 a FPGA would be too slow and small to produce a useful CPU. Certainly in the early 90s you would have been limited to single digit MHz and I seem to remember really struggling with propagation delays on the 80826 support chipset design I did.

  • I've often wished for variants of the 74HC153 or 74HC253 which had separate selection inputs for the two channels and were free of logic hazards (allowing them to be used as latches), as well as variants which included both true and complement inputs. Do you know if either was produced [or maybe is still produced, but eludes my efforts at parametric searching]? Muxes can be really wonderful for logic synthesis.
    – supercat
    Jan 7, 2017 at 23:17
  • 1
    Re using muxes for configurable logic, one interesting project I saw recently is a multi-function ALU that provides similar features to a 74181 using only 9 muxes (4 74HC153 chips and a 74HC151) and 8 XOR gates (a pair of 74HC85s), with the PCB being 1 inch square (i.e. comparable to the size of an original 74181, which was 0.6" x 1.2").
    – Jules
    Sep 6, 2018 at 22:54
  • By "80826" did you mean "80286" or something? Sep 7, 2018 at 7:28
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    @Wilson I've clarified a bit to show that I was talking about the support chip set for a 80286 being capable of fitting into an Actel based part.
    – PeterI
    Sep 8, 2018 at 7:08

For the individual hobbyist or small development shop, the equivalent of FPGAs weren't available. Hardware logic was built from manually routed or wire-wrapped boards with many 74xx logic chips.

An intermediate step for volume production that was available in the early 1980s was the uncommitted logic array (“ULA”) or gate array. One of the earliest uses was in the Sinclair ZX81. While the final logic connection mask had to be applied at the factory, for volume production ULAs proved cheaper and more compact than discrete logic chips.


Before FPGAs were PALs (Programmable Array Logic) and PLDs (Programmable Logic Devices). These had a programmable logic matrix of various forms, often followed by a flop to hold the result. Many variations were made, each trying to find the best package. These were roughly equivalent to MSI (medium scale integration) TTL circuits. Your comparison with a bit-slice adder is apt.

Eventually, as integration increased, more complex devices were made. I built some pretty useful logic around the AMD CPLDs (Complex Programmable Logic Devices), and also using some Atmel FPLAs (Field Programmable Logic Arrays).

FPGAs (Field Programmable Gate Arrays) went through a state where they contained every larger arrays of equivalent elements. Some were programmable like FLASH parts, and some loaded their logic configuration each time they were powered up.

The wheel of creation continues to turn, and now FPGAs often include processor cores, and special PHYs to connect with high-speed interfaces, such as USB, PCIe, DDR, and HDMI.

In the beginning, I designed programmable logic by drawing TTL diagrams and compiling that into fuse maps (sometimes by hand). Now, I do FPGA designs in Verilog and leave it up to the tool chain. Schematics as a representational tool don't scale as well as code.

  • Schematics as a representational tool don't scale as well as code -- yes, but like working in assembly language, they're a useful tool to concentrate your mind on building the most efficient implementation you can. When every gate requires you to select the type of gate, place it on the schematic, and wire up connections, you've got plenty of time to think about how to minimize the number of them you use, but with an HDL you can very easily use hundreds without even thinking about it. It all depends on what your goal for the design is; for me, it's often more about doing it right than fast.
    – Jules
    Sep 6, 2018 at 22:30
  • (Although: I say that while working on a CPU design in verilog on my other monitor. But that's for a quick proof of concept -- the plan is to build the final version in TTL.) Another thought: you've missed GALs off your list of predecessors -- they're comparable to PALs but are reprogrammable, whereas PALs were program-once devices, i.e. GALs are like EPROMs while PALs are like PROMs.
    – Jules
    Sep 6, 2018 at 22:32
  • Just a side comment - PAL was actually a term invented by Texas Instruments, very much like byte was invented by IBM. All other manufacturers had to use PLA even though almost all the engineers I have ever met refer to them as PALs. Same as everyone using bytes instead of octets.
    – cup
    Sep 8, 2018 at 18:11
  • @Jules I absolutely agree the schematics remain a vital tool. They focus the mind on a particular problem, and can lead to better analyzed and more efficient logic. Net list compilers and optimized are good, as they are for C code, but occasionally it is worth it to understand the best implementation and guide the tools to deliver it.
    – cmm
    Sep 12, 2018 at 1:47

The main point of FPGAs is the ability to have an (almost) arbitrary connectivity between the Configurable Logic Blocks (CLBs) within the FPGA chip. This is achieved by having configurable switch networks between the rows and columns of CLBs.

When the logic blocks are implemented with individual chips, the closest equivalent of a configurable switch network is a breadboard.

Therefore the answer is "yes, they were", as breadboards are quite field-configurable.

  • 1
    "field configurable" is not the same as "field programmable"
    – Alnitak
    Jan 6, 2017 at 16:19
  • 2
    In case of breadboards, "programming" them was done by hand rather than by loading a bitfile.
    – Leo B.
    Jan 6, 2017 at 20:26
  • @LeoB.: I wonder if anyone developed a system of programming logic via punched cards (e.g. a simple "FPGA" with four input pins and four 3-input LUTs might have a four 3x7 grid of contacts to connect the 3 select inputs of each LUT to one of the input pins or an output from another LUT) and four 8x3 grids of contacts to connect the data inputs of each LUT high, low, or to the output (making the LUT a latch without using up one of the select inputs on feedback). If one could get suitable stamped contacts cheap enough, such things could have been used to prototype a wide range of logic...
    – supercat
    Jan 6, 2017 at 23:07
  • ...using a fixed set of circuitry, and "re-build" earlier designs merely be re-inserting the old cards. The expensive part of an FPGA is the interconnect matrix, but if one could get the right sort of contacts, punched cards might provide a practical answer.
    – supercat
    Jan 6, 2017 at 23:09
  • @supercat: I haven't heard of anything like that.
    – Leo B.
    Jan 7, 2017 at 2:49

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