Technically this isn't just about video since it applies to any regularly scheduled DMA¹ from a non-CPU subsystem, but video is the most common application of this technique so I'll use that as the example.
The 6502 needs access to memory only half the time, during the what is usually called the ϕ2 phase of the clock. The other half of the time, so long as you tri-state the CPU address pins,² the bus and memory are available to other systems. This is often used for video systems that have a frame buffer in RAM directly accessible to the CPU; the CPU updates the frame buffer during ϕ2 and the video system reads the buffer during ϕ1, and there is never contention for memory access between the two.³
The Z80 does not have such a well-defined, synchronous system of accessing RAM. Many cycles don't need RAM access, but many do, and which particular ones do and do not depend on the instruction mix. Thus, at least on many early systems, when the frame buffer was in memory shared by the CPU and video subsystem (and the memory was not dual-ported) there was the possibility that both would try to access the memory at the same time and one would have to be denied access. This could be done by pausing the CPU, thus slowing down program execution, or by denying access to the video system, which would cause effects such as snow on the screen because the data to be displayed could not be retrieved.
Given a subsystem such as a video display that needed a certain amount of guaranteed bandwidth and had its frame buffer in single-ported RAM directly accessible by the CPU (i.e., the CPU could execute code from that RAM), was it possible on the Z80 to set things up so that the subsystem would always get that bandwidth and yet the CPU would never be paused or slowed, as can be done on the 6502? What sort of compromises, if any, would be involved in doing this? (By "compromise" I'm thinking of differences in behaviour that you would not have had if you had used dual-ported RAM to share the memory.)
¹ Wikipedia gives a good definition: "Direct memory access (DMA) is a feature of computer systems that allows certain hardware subsystems to access main system memory (random-access memory) independently of the central processing unit (CPU). ¶ Without DMA, when the CPU is using programmed input/output, it is typically fully occupied for the entire duration of the read or write operation, and is thus unavailable to perform other work. With DMA, the CPU first initiates the transfer, then it does other operations while the transfer is in progress, and it finally receives an interrupt from the DMA controller (DMAC) when the operation is done."
² On some versions of the 6502, such as the Commodore 64's 6510, there is a signal to request that the CPU do this itself. On others, such as the Apple II's 6502, external tri-state buffers are needed.
³ There were some systems, such as the Commodore 64, where more than half the memory bandwidth was sometimes needed, and from time to time these would "steal" cycles from the CPU as well as using all the ϕ1 time. But many, such as the Apple II, were designed so that the video system never needed to do this.