I'm planning out a protocol bridge between ZX Spectrum clone system bus and an FPGA-based extension device. I am considering adding bus request/acknowledge support for DMA purposes, but reading "Z80 CPU User Manual" pdf (UM008011-0816) I see a discrepancy in the descriptions.

The description of pins does not state the /RFSH pin is tri-state:

RFSH. Refresh (output, active Low). RFSH, together with MREQ, indicates that the lower seven bits of the system’s address bus can be used as a refresh address to the system’s dynamic memories.

But the waveforms in "Figure 8. Bus Request/Acknowledge Cycle" suggests /RFSH pin goes floating.

enter image description here

Is this really a mistake in the figure? The doc surely has lots of other typos (mainly in opcodes).

I don't really depend on the /RFSH functionality to keep DRAM refreshed during long DMA cycles, the clone's video subsystem does refresh during its normal operation. But I'd prefer to be sure about actual behavior of /RFSH pin with respect to bus request/acknowledge cycle.

  • 1
    Interesting question. Diagram and pin description are the same (although different worded) in the 1977 manual. Then again, /RFSH is only valid together with /MREQ, which is tri-state, thus it would make sense if /RFSH is as well tri-state.
    – Raffzahn
    Dec 10, 2021 at 13:56

1 Answer 1


Ok, I believe the answer lies in the A.C. characteristics table, not present in CPU user manual.

There are "Delay to float" timings specified for Address and Data bus, and for control lines. The control lines are listed there (/MREQ, /IORQ, /RD, /WR). The A.C. characteristics for the /RFSH pin does not include this delay, so I conclude the /RFSH pin is not tri-state. CPU won't assert the signal during bus acknowledgement cycle, but you also can't drive it on your side.

A.C. for control lines A.C. for buses

EDIT: A follow-up. It seems the SGS documentation is much cleaner about this. The waveforms clearly indicate that /RFSH is not tri-state and will be deasserted for the whole period of the bus being taken by external device.

SGS waveforms

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