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I need a little help navigating this ferrite core memory technology. My end goal is to use it in a calculator or something straightforward.

I understand the writing process to each core but how is reading accomplished? Do you have to measure the voltage on the sense wire and flip each of the bits while collecting the bits on the sense wire? Because I feel if you flipped all the bits at once you would have several voltages just summed together.

My memory pane is a 64K in size and has a front and back that are mirror and in parallel with the front. The sides have 4 windows and has 64x(s) and 64y(s) that I counted. How should I go about driving all these?

Any suggestions would be great help.

enter image description here

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    The question contains not only way to many different topics to be answered in a useful fashion, but as well asks for decisions about a new design which is clearly out of scope here. A good start would be to understand how core is working - which is already well described in this Wiki entry - well enough to design a working circuit as soon as basic data is recovered - like the magnetic properties (hysteresis) of the ferrite cores involved and the electric properties to produce according fields. Those need to be evaluated first.
    – Raffzahn
    Mar 4, 2022 at 19:28
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    Re, "if you flipped all the bits at once..." But you don't flip all the bits at once. You only flip one bit. You drive one X wire with a bit more than half of enough current to flip a bit, and you drive one Y wire with the same. Only the one core at the intersection of those two wires feels a strong enough induced field to flip. Mar 4, 2022 at 20:06
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    Reading is destructive, you need to write back the word you just read. Have a look at how the core memory drivers worked in existing computers, e.g. the PDP-8. There are plenty of docs and circuit schematics on bitsavers.
    – dirkt
    Mar 4, 2022 at 21:12
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    You may think this is primitive but have a read up on mercury delay line memory. You'll be amazed at how sophisticated magnetic core is after that :-)
    – paxdiablo
    Mar 5, 2022 at 0:50

3 Answers 3

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I understand the writing process to each core but how is reading accomplished?

By writing a zero and looking at the sense line:

  • If that bit was a zero nothing happenes
  • If that bit was a one a pulse can be sensed on the sense line.

After that the stored content is zero, that's why it's called a destructive read, so content needs to be written again.

Reading is essentially a combination of clearing the bit to read, reporting if a blip was seen (=1) or not (=0) and then writing it again. That's why each core stacks usually not only had dedicated amplifier logic, but also a register (one flip flop per plane) to hold what was read and logic to write it back without interaction of the host - much like later DRAM.

Do you have to measure the voltage on the sense wire and flip each of the bits while collecting the bits on the sense wire?

Yes.

Because I feel if you flipped all the bits at once you would have several voltages just summed together.

Oh, I guess that's where you're stuck. What your picture shows is a single plane. Only one bit can be read or written at a time. To form bytes or words, several planes are stacked to form a ... well ... Stack (of core).

And yes, the plane seems to be four dedicated 64x64 sub-planes, but it does not allow a bit operation per sub-plane (working independently), as they use all the same X/Y lines. Any attempt to address two different bits in different sub-planes will also activate two mirrored bits (*1).

Then again, one can use this type of sub-plane to make a single board stack always writing(reading) the same bit in each sub-plane combining them to a 4-bit word (or 8-bit, if there's another 4 planes on the back).

This means activating the same row/column on each sub-plane. It still needs the same amount of drivers (one per X and Y line and plane, to be able to do 0/1 independently) but only one board with core. Very handy for small machines.

My memory pane is a 64K in size and has a front and back that are mirror and in parallel with the front. The sides have 4 windows and has 64x(s) and 64y(s) that I counted.

That doesn't really add up. 64x64 cores per sub-plane is 4,096 - with 4 of them on the front and back this adds up to 16,768 bits or 4 KiB.

How should I go about driving all these?

Well, you need a pair of drivers for all X and Y able to be switched per sub plane, 8 sense amplifiers to read and some logic to handle decoding and store the result in a register to be read by some consuming device.

Depending on your goal, this might be either a full figured parallel acting hardware, or a microcontroller with some decoders handling the 8 sub-planes in a serial fashion - which of course will be slower, at least for writing (2).

Personally I'd go with a microcontroller, a single adjustable write source and a set of CMOS multiplexers to 'scan' across the planes. Might be slower, but saves greatly on part count (*3).


*1 - Assume one writing bit 1;1 in the upper left sub-plane and 2;2 in the upper right, then bit 1;2 in the upper left and 2;1 in the upper right would also be written with the same value.

*2 - One can use 8 parallel inputs to read all 8 planes in parallel, while writing back in serial would be done only for ones, thus saving time.

*3 - Depending on circuit design one could interleave reading/writing the planes to some degree. Might be fun to fiddle with that :))

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Reading a bit from core is a destructive process; essentially you try to write a '1' and monitor the sense line to see if there's a current spike when you do that. There's only a current spike if writing the core flipped the bit, i.e. if it was '0' to start with. I believe most core controllers would automatically write back any 0's so detected. (Or, just as easily, write 0s, detect pulse if bit was 1, and write-back 1s)

The way you write to just one core in the whole array depends on the non linear response of the magnetics to the drive currents. You run 1/2 the necessary current through one of the column lines, and 1/2 through one of the row lines. Only that core at the intersection of the row and column gets enough of a kick to change state.

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CuriousMarc has some really interesting and educational content about core memory (and a lot of other stuff) in YouTube. Watch Core Memory Explained and Demonstrated for details.

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    Welcome to Retrocomputing! Stack Exchange sites generally don’t like answers which contain only a link to other content (which may bit rot, change, or be deleted); please check out the Tour to learn how to write a great answer. (You could summarize CuriousMarc’s work, if you wanted.) Nov 24, 2022 at 1:22
  • @Jacob Krall: While I concur with this criticism, you must agree that it would be difficult to copy a youtube tutorial, or even excerpts from it, into an answer. Nov 24, 2022 at 2:01
  • This is simply the best possible answer for this question. I bet no other answer could be more helpful than this one for the next two years and we will see. Nov 24, 2022 at 2:23
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    @A.I.Breveleri Nobody is suggesting copying the vid. You can watch it, understand it and write something in your own words. The point is to make the site as self contained as possible and link only answers do not serve that objective, unfortunately.
    – JeremyP
    Nov 24, 2022 at 9:13

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