The CPU Maintenance manual gives a bit of additional information:
Bit 8 specifies maintenance use of the memory management unit. It is used for diagnostic purposes. For the instructions used in the initial diagnostic program, bit 8 is set so that only the final destination reference is relocated. It is useful to prove the capability of relocating addresses, in destination mode only.
So you can have a test program run with basically memory management disabled (so in particular instruction and data fetches won't be affected by a damaged MMU), and then write something to memory and have MMU relocation effective only for the final write of that step. Then you can read back the value from where it should be, but without MMU relocation, and in this way you can test whether MMU works correctly, under a variety of MMU settings.
It should be easy enough to implement in an emulator, as you have to make MMU conditional anyway. Just separate the MMU relocation for the final write from all other MMU relocations.
Ok, but how does it work? Which commands are different in what way?
From the description, any commands that write to memory, and only the final write access is relocated in maintenance mode.
I did not trace out the actual mechanism in detail, but the microcode has a
ENAB MAINT bit (same manual, page 4-76). I would expect this bit to be set in the microcode ops that do the final write. I'd also expect this line to be processed together with the
MAINTENANCE MODE and
ENABLE MANAGEMENT bits in Status Register 0 to either bypass MMU relocation or perform the relocation.
That should be easy enough to verify in the microcode listings and the schematics, but that needs a bit of time investment, in particular as I couldn't find the manual with the explanations for the microcode for the 11/34, so I'd have to piece together the whole microcode first.