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The RLV12 Technical Description (EK-RLV12-TD-001) describes the RLV12 registers as "word-addressable". I presume that means these registers can only be accessed as words and byte access would fail. If that is correct what would the reaction of the controller be to a byte access on one of its registers (be it on an even or odd address)?

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  • I would guess that a DATOB (data out, byte) transaction wouldn't be recognized, maybe leading to a bus timeout. Section 3.5.1 talks about word operations DATI and DATO, only. But this is only guesswork.
    – dave
    Jul 8, 2022 at 17:16
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    @another-dave Alternatively, for a "word-addressable" register, DATOB could be simply ignored (that saves a few logic gates), and byte operations would succeed, corrupting the register. In principle, the choice would depend on the HW designer and/or the management, and I would not be surprised if it could vary even between revisions. In other words, "word-addressable" means "using byte operations on the register is undefined behavior, do not attempt".
    – Leo B.
    Jul 8, 2022 at 18:12
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    Having written a few PDP-11 and VAX drivers, I concur with your interpretation of the practical meaning of "word-addressable", especially your last 3 words.
    – dave
    Jul 8, 2022 at 19:51

1 Answer 1

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TL;DR:

Those registers are assigned at word boundaries and to be accessed with word operations. Any byte access is simply not defined.

Once Upon a Time ...

Today we take it granted that memory addresses point to bytes and access is done in bytes or more. But that is only a convenience that came to be with the IBM /360, which not only settled that a byte is 8 bits, but also byte addressing independent of word size. Before that data access was (almost) always word wise and these words were addressed consecutive. Any smaller access had to be done by building words from bits before writing or taking them apart into whatever was needed after reading. An art lost in history today - but not back when the PDP-11 series was conceived. Back then people still know the meaning.

And That Means?

The PDP-11 series is a 16 bit machine with word organized, byte addressable memory. Or in simple words:

  • Word size is 16 bit i.e. two byte
  • Memory is 16 bit wide
  • IO-bus is 16 bit wide
  • Addressing is byte wise
  • Each byte of a word can be addressed on its own
  • Thus
    • memory words are accessed on even addresses (x0/x2/x4/x6/...)
    • bytes (within a word) are accessed via even and odd adresses (x0/x1/...)

In this context 'word-addressable registers' means that these registers are assigned to word addresses, not byte addresses. Nicely shown in any list of them, like table 1-1 (p.1-4) or 3-2 (3-16) of that document:

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For registers like that words access is usually as well implied. That is, any read or write has to be done for the whole word as one, not as single bytes.

Why?

Well, it simplifies hardware:

  • No need to care for byte access
  • No need to synchronize upper/lower half access
  • No need to byte-swap for uneven assignment

and most important:

  • Any change of a register is atomic
  • No chance for a programmer to screw up sequence (within a word)
  • All values written are always valid

What If I Still Do Byte Access?

It may not work at all, for example due byte access not being handled at all, or screw data, like clearing CSR/CRDY before setting the drive, thus possibly writing to the wrong drive.

It is simply not defined what happens if a programmer does not follow the rules set by the manual. This is operating at the lowest level, there is no mighty megabyte sized OS pampering everything twice. We're talking about hardware made at a time when a single gate, or even transistor was an investment to be avoided. Why on earth should hardware be thrown at bad software?

As always: Do as told by the manual, don't try to outsmart the designers :))

In fact, even defining such behaviour might be quite harmful, as it's implementation dependant and may change between versions and models.

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    The question is surely not "should I obey the manual?" but rather "what happens with this specific device if I don't?". Our consensus seems to be "we don't know but it's probably not going to be good".
    – dave
    Jul 8, 2022 at 22:04
  • @another-dave point is that for such no real answer exists, as it's simply not defined and implementation depending. A conclusion independent of what controller or CPU we're talking. Don't do Stuff that's not documented as it may and will change. Without giving any prior notification - like field service replacing the controller for whatever reason.
    – Raffzahn
    Jul 8, 2022 at 22:56
  • I agree that the reaction to a register byte access is undefined and shouldn't be tried. A RLV12 controller will however have some sort of reaction implemented to a register byte access (even if that is no reaction or data corruption). I'm interested in the exact behaviour as I'm writing a RLV12 simulator and have to code some sort of reaction and would like to keep the behaviour of the simulator as realistic as possible.
    – JosF
    Jul 9, 2022 at 7:22
  • @JosF If my task (and I would even go there), I'd simply add an emulation error exit for anything but a word access. This will already during early test reveal if there is non word access at all. At least under the assumption that the emulator will be tested prior to publication :))
    – Raffzahn
    Jul 9, 2022 at 8:50

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