I have a question about the Z80 interrupt handling. This processor has 3 modes: 0, 1, and 2.
Modes 0 and 2 are supposed to fetch something from the data bus, and a protocol exists to inform the requesting device that it is time to produce such a piece of information.
Mode 1 does not accept data from the external device.
I would like to know if this mode will still produce the same interrupt ACK protocol used in modes 0 and 2. That is: starting the new M1 cycle with IORQ asserted instead of MREQ.