I've been trying to figure out how the sequence of microcode instructions as described in the [schematics and ROM listing][1] in the PDP-11/40 (KD11-A Processor) relates to the timings given in Appendix C of the [Handbook], but I can't make the two match. If I just add up the time for the microinstructions, the result is always lower than it should be.
Example 1: JMP
(Mode 1), 1.80 µs nominal
Cycle Bus Microcode
───── ─── ─────────
140 ns + FET00/01/02
140 ns FET03
200 ns FET04
140 ns FET05
200 ns JMP00
140 ns JMP04
200 ns JMP12
140 ns JMP13
──────── ─────
1.30 µs, 1 Bus Cycle
Example 2: JMP
(Mode 2), 2.10 µs nominal
Cycle Bus Microcode
───── ─── ─────────
140 ns + FET00/01/02
140 ns FET03
200 ns FET04
140 ns FET05
300 ns JMP01
200 ns JMP02
140 ns JMP04
200 ns JMP12
140 ns JMP13
──────── ─────
1.60 µs, 1 Bus Cycle
Example 3: JMP
(Mode 3), 2.30 µs nominal
Cycle Bus Microcode
───── ─── ─────────
140 ns + FET00/01/02
140 ns FET03
200 ns FET04
140 ns FET05
300 ns + JMP05
140 ns JMP11
200 ns JMP12
140 ns JMP13
──────── ─────
1.40 µs, 2 Bus Cycles
I know about the three possible clock cycles (140/200/300 ns). I know that the clocks are turned off for a Unibus cycle and turned on again at completion of the cycle, but I get varying length for the bus cycles, if these intervals are what is what is missing.
So: Given the sequence microinstructions for a command as described here, how can I derive the time necessary to complete a macroinstructions?
Other references:
The Handbook
The Processor Manual explains the microcode signals, among other things.