What logic did the IBM 360 use to detect, and perhaps correct, memory bit errors?
The IBM 360 manual Principles of operation says:
The system transmits information between main storage and the CPU in units of eight bits, or a multiple of eight bits at a time. [...] A ninth bit, the parity or check bit, is transmitted with each byte and carries parity on the bytes. (Page 7)
As it is called parity, that bit would be an exclusive-or of the other eight bits, and indicates an odd or even number of ones in the byte itself. A single parity bit can only used to detect single-bit errors, but cannot correct them.
The following paragraph indicates that parity bits are used for registers as well as main memory:
Following emergency power turn-off and turn-on or system reset, incorrect parity may exist in storage or registers (Page 81).
As page 117 shows, this includes floating-point registers and the PSW (program status word). Page 121 mentions a parity bit for addresses as well. There is also parity for I/O operations.
The /360 Family uses parity all over the system, not just for memory:
One Bit per Byte on
- main memory
- local storage (*1)
- data path
- address path
- channel data
One Bit per Nibble on
- BCD data path
Three Bit per Word on
- microprogram storage
For all of those (*2) parity information was generated by source and checked by destination.
Except for microprogram storage parity was generated by applying XOR over all bits involved (counting ones mod 2).
Microprogram was a bit more complex as it featured sectional and over all parity, allowing to route parts (addresses) over different path without the need to regenerate parity (*3)
All checking, except for the full microprogram word was done by again XORing and comparing the result.
Any parity error was reported as a machine error - essentially a high level interrupt.
Early /360 did not do any correction, only detection of single bit errors. Later models (and compatible manufacturers) modified this into SEC-DED (*3) but only on main memory.
Why No Correction?
The 1961 IBM 7030 Stretch already used SEC-DED, so the IBM engineers were well aware about the benefits before designing the /360. Except the /360 wasn't conceived as a single machine but a family of compatible systems with
- 8 bit wide memory for the model 30
- 16 bit wide memory wide memory for model 40 (adder only 8 bit)
- 32 bit wide memory for model 50
- 64 bit wide memory for model 60 and above
The only commonality of those is the usage of multiples of 8 bit bytes, so parity was made on byte base to create a flexible design that would allow implementations with a vast performance range. IIRC the relative performance between Model 30 and 62 was about 1 to 50.
*1 - Which includes ISA registers.
*2 - Yes, including microprogram, as that was as well loadable.
*3 - Rather helpful for the most time critical part of a machine
*3 - Single Error Correction, Double Error Detection, otherwise known as Hamming (72,64) code.