# Why does the Manchester Baby have two jump instructions?

The Manchester Baby has 32 words of memory, 32 bits each. An instruction word occupies the full 32 bits, so that the maximum length of a program is 32 instructions.

Of course, like any other computer, it needs to have flow control. Here's where the Jump instructions come in, and of course the Test instruction as well.

But why include (in modern terminology) both an absolute jump and a relative jump? I don't imagine they were thinking about position-independent code here, or calling libraries or anything, all in thirty-two words. Also, it looks like these two jumps were deliberately put in; the optional addition of the program counter and operand does not seem to follow from the opcodes' encoding.

If my understanding of The Manchester Computer: A Revised History Part 2: The Baby Computer is correct, the relative jump instruction “fell out” of the design.

The Baby doesn’t really have an instruction set as such, but rather data transfers (to and from the control instruction, storage, and the accumulator); the instruction set is the result of the possible operations on transfers. The control instruction (instruction pointer) supports additions, the accumulator supports subtractions. The planned instruction set was as follows:

1. If x is any number in the store, –x can be written into a central “accumulator” A.
2. x can be subtracted from what is in A.
3. The number A can be written in an assigned address in the store.
4. Control can be shifted to an assigned order in the table.
5. The content of A can be tested for whether x ≥ 0, or x < 0; if x < 0 the order standing next in the store is passed over.
6. The machine can be ordered to stop.

Note the absence of relative jumps. But Copeland then writes

Instruction 4 in the sidebar “The Baby’s Instruction Set” provides a variation on this basic rhythm. Instruction 4 replaces the number in C.I. with the number stored in a given line of S. Figure 1 indicates the potential for adding a number from S to the number in C.I., a facility soon added to the Baby’s basic instruction set.

(Figure 1 shows the possible transfers and the adder and subtracter.)

The instruction pointer had to support addition for its normal operation: +1 to move to the next instruction, +2 to skip the next instruction (instruction 5). It seems that extending that to any value in storage was natural to its designers; I don’t know whether the transfer design supported that implicitly (i.e. the “decoder” provided the function even though it wasn’t explicitly designed in) or it had to be added in.

The quote above is based on information in one of Tootill’s notebooks, referenced as G.C. Tootill, “Digital Computer—Notes on Design & Operation,” 1948–1949, Nat’l Archive for the History of Computing, Univ. of Manchester. It doesn’t seem to be available online.

The Baby / Mark 1 50th anniversary site has a notes page mentioning that

One of the indirect jump instructions is redundant, but the advantage of having both relative and absolute jumps was realised in the early thinking on programming.

Presumably there are papers discussing this. It’s also worth bearing in mind that the Baby was a CRT storage proof-of-concept, intended as a step towards a bigger and brighter future — so it might have been more interesting to have both forms in preparation for their use in a future, larger design.

• Regarding having the ability to add +1/+2 being already there: I haven't looked into the schematics, but adding one (or twice one) can be done by a much simpler incrementer, eliminating the need for a full fledged adder. Ar the same time addition of a constant can be made using subtraction by encoding the constant accordingly (as mentioned, haven't looke into the details). Commented Sep 6, 2023 at 15:32
• @Raffzahn however, sometimes you can reuse an existing adder and just route the result. Like, we already need to be able to add registers together, rather than creating a seperate incrementor, just send 1 and a register to the adder. Commented Sep 7, 2023 at 15:28
• I never realised that... If you have an adder to add 1, you can add two by just starting the add operation at bit 1 instead of bit 0. Commented Sep 8, 2023 at 13:24

In support of Stephen's detailed answer one may even go as far and state that almost half of the SSEM's instructions were jumps (3 of 7 (*1)):

• 000 - Move S to CI - Absolute Jump
• 100 - Add S to CI - Relative Jump
• 011 - Test - Skip (*2) over next instruction if A is negative (*3)

For prototype supposed to show basic functionality a complete set of flow instructions has priority over a rich collection of arithmetic instructions. With a possible exception of loop counting those three cover all basic ways of control transfer (*4).

I'd take it as a strong hint about them exploring that area.

*1 - The SSEM does, unlike often spread, not feature eight instructions. While three bits of the field are decoded for instructions at all, for Subtraction only two were checked (x01), thus it occupied two possible combinations.

(I tend to think this was on purpose with one of them being reserved for addition, which was dropped as unnecessary for first operation, thus checking that op code bit could as well be spared, saving even further circuitry - remember, we're talking a time when every wire counted for additional hours to build :))

*2 - Personally I'd really love CPU designs providing conditioned skips over branches - especially with simple ones - as they can turn any instruction into a conditional one without spending dedicated bits - somewhat the best of both worlds: short default encoding and conditional execution for every instruction.

*3 - The 'Modern Mnemonics',especially using CMP, noted in a table of the SSEM's Wiki page is also not part of the cited source material (like Napper in The First Computers: History and Architectures) but rather a typical bad made confluence of fan-boyish fantasy based on rather miniscule knowledge in the field. And no, I'm not going to edit it into a SKP (or any of the others like STO into STA), as I'm not interested wasting my time for edit wars.

*4 - For plain jumping that is - subroutines, supervisor or function execution is a different topic.

• Nice way of reframing ;-). I wonder about the subtraction opcode — addition was added later on, but the opcodes were extended to four bits. That’s not conclusive either, because at least three instructions were added, so in any case more bits were needed... Commented Sep 6, 2023 at 14:28
• By reframing, I only meant presenting the jump instructions as being nearly half of the available instructions. Commented Sep 6, 2023 at 14:56
• @StephenKitt Ah yes. Guilty as charged. I couldn't help, it was too tempting to use this to emphases how much more important program flow instructions are on smaller designs. Something sill visible today. Just compare the 8086 with some of today's x86. The few newer program flow instructions are by far outnumbered by ever more complex data handling instructions. Commented Sep 6, 2023 at 15:03
• Conditioned skips are quite a common feature in GPU architectures, because they can also be vector conditioned (executed for some data streams, but not others) without requiring parallel vectors. ARM also has everything conditioned, and its turned into a nightmare for their OOE designers, because it means all instructions have an implicit dependency on the flags register. Commented Sep 6, 2023 at 17:45
• @Lorraine as explained, the ones created are simply false. Instruction 011 being the most visible as the function does not compare are anything but tests the negative flag. So any 'modern' should as well be TEST - or SKIP as that's not only the flow function but as well the description. Also, while those 'modern' reflect the single accu structure, they do not follow the left to right thinking of the machines creators - something shown by GAS' AT&T syntax. Last, but not least they try to force 3 letter mnemonics. something only special for a few CPUs, notably the 6502. Fan-Boi Fantasy. Commented Sep 7, 2023 at 11:51