The invention and spread of interrupts in the 1950s is reasonably well known but I am curious: were there any systems after which didn't support them?

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    I’ll bet there’s at least one of the prominent single-board computer kit / evaluation systems — the KIM-1, MK14, etc — that doesn’t use interrupts or expose the relevant pins. Would that count or are you looking for a processor architecture that doesn’t support interrupts?
    – Tommy
    Commented Nov 27, 2023 at 12:19
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    On a regular Apple II, while it was possible to have IRQ and NMI on peripheral cards, there was no use of them in normal use even with floppy disks. Commented Nov 27, 2023 at 16:08
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    I so much wanted to be able to answer 'CDC 6600', but (a) you said 'computer' and not 'processor', and (b) I think that PP0 forcing an Exchange Jump is an interrupt as far as the CPU is concerned.
    – dave
    Commented Nov 28, 2023 at 0:44
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    The Computer/System classification is rather vague. It might be helpful to specify if this is about CPU hardware without real time events (interrupts) or systems where such is present but not used. After all, one can use any CPU without employing interrupt capabilities (ignoring Reset in this conext).
    – Raffzahn
    Commented Nov 28, 2023 at 14:39
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    Does the MIX count? I/O required polling. I recall (possibly incorrectly) the response to undefined program operation is 'halt'.
    – dave
    Commented Nov 29, 2023 at 20:17

10 Answers 10


The Wang 2200 series of minicomputers (Apr 1973 to Jul 1989) was implemented without hardware interrupts. All peripheral interaction was handled via polling.

These machines were fitted with a BASIC interpreter which also served as the operating system. Users were not given access to the underlying machine code, and Wang did not publish the assembler etc. For all practical purposes the "machine code" of the Wang 2200 was compressed BASIC.

The interpreter carefully polled for peripheral activity before each BASIC statement, and even during some of the longer statements. The interpreter was completely robust, but it was possible (though quite difficult) to confuse it into delaying any polling for several minutes, giving the impression that the 2200 had crashed.

  • “Barely possible”, or “easily possible”?
    – RonJohn
    Commented Nov 28, 2023 at 21:32
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    @RonJohn: "Barely possible". I was able to do it only after the developer of the interpreter, Bruce Patterson, showed me some of the weaknesses in his design. Even so, it took me several days of experimentation to produce a reliable hack. Commented Nov 29, 2023 at 3:28
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    @A.I.Breveleri - you might put that 'barely possible' clarification in the main answer since it adds useful info and might disappear since it is a comment.
    – Jon Custer
    Commented Nov 29, 2023 at 14:15
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    I recommend rewording it to something along the lines of "...possible, but with great difficulty, to..."
    – TKoL
    Commented Nov 29, 2023 at 16:08
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    @Joshua: No POKE, no PEEK. No NOTE, TONE, NOIS, ENVT, ENVN, or HUSH. No GRAB, SHOW, LINK, or DIST. Definitely no SYS(). - It does however have some extras: $GIO, $IF ON, $TRAN, $PACK, and $UNPACK which are used to control peripheral devices. Commented Dec 1, 2023 at 4:29

The first microprocessor, the Intel 4004, had no interrupt capability.

Its successor, the 8008, had interrupts, but with the shallow call stack and the need to reserve scarce registers to do any sort of context save, they were nearly unusable.

  • A friend did a ME using an 8008. He went on to start a very successful business selling taxi management systems. Programs in taxi units and base and netword and radio control software. On air siftware updates, GPS, ... . World class. Commented Nov 29, 2023 at 12:12
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    @RussellMcMahon what is "ME" Commented Nov 29, 2023 at 12:42
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    @OmarandLorraine Sorry - ME = Master of Engineering. (IN electrical engineering in his case)(and mine). Then a PhD in his case, and not mine. Commented Nov 30, 2023 at 11:31

Sharp pocket computers based on the ESR-H SC61860 micro-controller (PC-12xx, 13xx and 14xx) did not have interrupts. No instructions like rti, nothing. Everything was done by polling (it had for example two instructions CUP and CDN which would poll the Xi pin of the cassette interface a given number of times of a loop counter or stopping when the pin gets the waited state).


Would embedded systems count?

If yes, there were GI's PIC1600 MCUs (http://bitsavers.org/components/gi/PIC/1983_PIC_Series_Microcomputer_Data_Manual.pdf), predecessors of PIC microcontrollers by Microchip, some of them had no interrupts.

From that time, the legacy PIC12C Microchip's microcontrollers, (for example PIC12C508 https://ww1.microchip.com/downloads/aemDocuments/documents/MCU08/ProductDocuments/DataSheets/40139e.pdf) did not have interrupts either.

  • I've not looked at PICs lately; has Microchip abandoned the 12-bit core for new designs? I would think the 10F family would be the market segment least affected by the increasing availability of cheap ARM-based MCUs.
    – supercat
    Commented Nov 27, 2023 at 16:48
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    @supercat Microchip still sell PICs however since Microchip bought Atmel they're also selling its rival AVR micros and AVR has basically taken over the PIC market with Arduinos being the gateway "drug" for the entire AVR family.
    – slebetman
    Commented Nov 28, 2023 at 8:37
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    PIC16C5X also did not have interrupts. They are still sold, and available off the shelf. Nasty limitation for anything of any complexity, requiring repetitive polling from different locations in the code. The last one without interrupts was probably introduced early in the 90s (from memory). I think all the flash ones have interrupts but could be wrong on that point. More modern but OTP extreme low end few cent 8bit MCUs from companies like Padauk do tend to have interrupts. Commented Nov 28, 2023 at 23:52
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    @SpehroPefhany: The 10F series were basically six-pin versions of the 12F5xx parts that were flash versions of the 12C5xx parts that were in turn essentially 16C5x parts with eight pins lopped off, but with a tweak to the EPROM programming logic.
    – supercat
    Commented Nov 29, 2023 at 4:51

Lots of examples could be found among many of USSR era home computers based on the KR580VM80 chip (a clone of i8080).

In a normal i8080 system, the CPU is supposed to work with companion (or 'chipset') chips, like i8228 and i8259, as to have interrupts, IO space and control of the bus drivers.

However, it was quickly understood, that it is still possible to build a working system by dropping all of those companion chips and using an absolute minimum of glue logic ICs. As the result, interrupts and IO space were unused. Some home computers of the era even used INTE output to generate sound.


Although the Apple II family of computers allows I/O cards to use interrupts, none of the internal hardware on the Apple II nor the Apple //e offers any support for them beyond making the pins available on the card-slot connectors, nor is there any documented means by which multiple cards wanting to use interrupts should coordinate such efforts. While some I/O cards did make use of interrupts, the majority of Apple II systems have never used any hardware or software that employed them [the most common I/O boards by far were a Disk II controller, a generic parallel printer interface, and an 80-column card, none of which used interrupts; relatively few systems ever had anything else installed].

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    The mouse card and the Mockingboard are 2 cards that used IRQ afaik. Commented Nov 27, 2023 at 17:33
  • @PatrickSchlüter: Probably true, and I'm pretty sure the Super Serial card could use an IRQ if software knew how to use it, but I doubt any of those things would have been installed in even 10% of Apple II family machines, save for the Apple //c's inclusion of a UART. I'm not sure what fraction of software for the Apple //c ever used the IRQ on the UARTs, versus simply treating one of them as an output-only printer port. Even if most Apple //c machines were employed with software that used IRQs, the majority of Apple-II family machines sold before the //c would never have used them.
    – supercat
    Commented Nov 27, 2023 at 17:49
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    no contest. I gave these example just for a fyi not as a rebuttal of anything. I gave myself the Apple II as example of a system not using interrupts normally if you look at the comments of the question. Commented Nov 28, 2023 at 7:13
  • @PatrickSchlüter: I hadn't noticed. Though saying "even with floppy disks" implies interrupts would have had some use there. I guess maybe having a timer tick that could be enabled and disabled to turn off the drive after a period of inactivity might have saved a 555 and had some other slight advantages, but nothing major. Much more useful would have been using R/W to select on/off for the soft switches, but then having one of the address lines gate RDY with bit 7 of the shifter.
    – supercat
    Commented Nov 28, 2023 at 15:49
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    The enhanced //e had better firmware support equivalent to the //c. The //c itself can actually generate interrupts for VBL and also keyboard events, which it uses to buffer keystrokes (in AUX RAM IIRC). Commented Nov 29, 2023 at 3:45

Another example from the embedded world: the Parallax Propeller uses multiple CPU cores to service events instead of interrupts.



The Atari 2600 Video Computer System draws its entire screen using techniques that on other systems would be accomplished via raster interrupts, but its 6502 die is in a 28-pin package that omits both /IRQ and /NMI. Timing is accomplished by polling the RIOT chip to wait for a moment near the start of the desired scan line (if code doesn't already know within a scan line where the beam is) and then writing any value to address 2 (or any address having the bit pattern xxx0 xxxx 0x00 0010), which causes the Television Interface Adapter (TIA) chip to assert the READY line until the start of the next scan line, which will stall the first read (which will usually be the next cycle) after the store. While there are some situations where having a raster-split interrupt might have been nice, even code which will take an unknown amount of time to execute can usually be punctuated with calls to a routine that starts like:

    BPL NearTrig
    STA saveA
    LDA #122
    BCC WaitMore
    STX saveX
    STY saveY

This will return immediately if the TIA's counter is within six counts of reaching the value 124 (about 384 cycles if using divide-by-64 mode), but otherwise allow the code to start executing precisely at the scan line where it reaches the proper count. If game logic never goes more than about 350 cycles without a call to this routine, it can take any number of cycles in total without disrupting video display. If the display logic includes frame-counted animations, and the main game logic waits for animations as appropriate, the system can run games smoothly even if the logic would take multiple frames.

The performance degradation from having game logic poll for the display was significant, and having a timer interrupt would have allowed the game logic to run somewhat more efficiently and compactly, but scattering a JSR DispPoll throughout parts of the code that weren't time critical, or BIT INTIM / BMI $+5 / JSR DispPoll throughout those parts that were [reducing the time penalty from 18 cycles to 7 or 8] wasn't especially onerous. Having interrupts will allow many tasks to be accomplished more efficiently than would otherwise be possible, but when efficiency isn't critical, polling can often be sufficient.

  • Polling can be even more efficient than interrupts under the right circumstances. In about 1980 I was doing a program on a PDP-11 that needed to drive 4 terminals at 9600 baud. Interrupts introduced too much overhead and it was impossible. Polling allowed them all to keep up. Commented Nov 30, 2023 at 4:20
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    @MarkRansom: Quite true. Polling can also reduce timing uncertainties, especially if one uses the something like the 6502/6507 RDY line for assistance. BTW, I wonder if it would be worth noting that the 6502 family included "stock" parts which lack interrupt pins; while the Atari 2600 may have been unusual in its choice of pin functions, the 6507 was hardly a custom part.
    – supercat
    Commented Nov 30, 2023 at 5:19

The Parallax Propeller processor for quadcopters has (I write has because it's in production today for its intended purpose) no interrupts, and this is an advertised feature (so that execution performance is predictable).

I found this most expedient when working in assembly language. I could do without a clock by balancing the instruction costs on both sides of an if/else operation.

  • The Parallax Propeller is not really "for quadcopters"; that's only one possible use case among many. Mine is currently programmed to generate NTSC composite video, and interface with a PS/2 keyboard, in a replica of an Apple I. Commented Dec 6, 2023 at 15:47

Yeah, the higher perfromance CP/M computers (either an 8080 or Z80 processor) had interrupts but some had to poll the devices. These used a BIOS so your CP/M applications could access the screen, disk(s), serial ports and (if it had any) networking through standardized calls. This allowed implementation from a cheap cheap setup with bare minimum auxilalry hardware using polling up to high performance with interrupts, DMA, and a coprocessor speeding up the device in question, with everything in between depending on the system.

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