A version of the 8052 with a built in interactive BASIC (via serial port) was actually sold as an Intel product in the 1980s. Some ROM images of that interpreter can be found on the web and uploaded into a flashable (or UV-EPROM) 8052. These chips will need the usual paraphernalia of a small 8051/8052 system: Clock crystal, reset circuit, serial level conversion (or straight connection to an usb-to-rs232 chip), address/data latches if you want to add any memory-mapped peripherals.
Mind that development boards that AND PSEN (correction: /PSEN) and CS (correction: /RD) together to facilitate ROM monitors need to be modified to support the interpreter.
Ah, that needs explanation: Before you had MCUs that were quickly re-flashable in-system, one good way to test things out as a developer was putting a monitor program (a mini-OS if you will) in the ROM and feeding it code via the serial line from a host computer. Since an 8031/8032/8051/8052 is a harvard-like architecture that addresses program and data store in separate spaces, you absolutely needed external RAM and a bit of circuitry to make it accessible as both program (/PSEN line) and data address space (/RD line).
Burning EPROMs to test code was impractical unless you had a large supply of EPROMs (and they were expensive, windowed-EPROM versions of microcontrollers like the 8748/8751 even more so!) - you needed to erase them before reprogramming, which takes 8 to 15 minutes.... EEPROMs, expensive and slow....
Needs another explanation: Every "classical" 8051/8052/80c517/537 (Essentially, the 40pin and up versions. Even a mask ROM version pulled from some old keyboard or VCR!) can be wired up as an 8031/8032 and forcibly driven from an external program store. The prescribed wiring in the datasheets for the 805x (ROM or Flash) vs 803x actually decided under what personality the chip ran. Very likely, no 8031 was ever made as such, given there must have been a good supply of mis-programmed ROM 8051/8052 around...
PS, don't get fooled by outrageously high clock rates (up to 40MHz!) for a 1970s design: they are very microcode heavy and have very bad instructions per clock cycle ratios (12 clocks per instruction is the minimum on an 8051 running off ROM)...
Here's some detailed interviews with the people that designed the 8051 and 8048...
http://archive.computerhistory.org/resources/access/text/2013/05/102658339-05-01-acc.pdf
http://archive.computerhistory.org/resources/access/text/2013/05/102658328-05-01-acc.pdf