If you look at the datasheet of a typical DRAM chip of this era, say the Mostek 4116, it indeed has a cycle time of 375ns, so you can't access it at more than 2.6 MHz.
But don't confuse the clock rate of a microprocessor with the bus timing. Looking at figure 4-1 of the 68000 datasheet, a simple byte read or write bus cycle takes 4 CPU cycles (8 bus states; each state is half a cycle), and the simple word read or write bus cycles in figure 5-1 also takes 4 cycles, so indeed RAM access time was 2 MHz for a 8 MHz CPU clock.
Note that the whole cycle determines bus access rate: The address must be valid first, then the address strobe
AS changes, then data is provided and validity signaled by
LDS. That you see the data valid for four cycles means nothing by itself.
Also, nearly all microprocessors had a way to delay bus cycles for slower devices on the bus ("wait states"), so even if some CPU happened to be faster than RAM, it could always be slowed down to match RAM speeds.
In fact, clock rate of a microprocessor doesn't say much about how "fast" it is if you compare different models. For example, the Z80 typically had a higher clock than a 6502, but also needed more cycles to complete an instruction.
So, always look at the details, don't rely on raw numbers.