PDP-11 is said to be word addressable, which means every data access returns 16-bit data. Suppose I give a read request for address 100 in memory. Will it return 8 bits (LSB) from address 100 and 8bits (MSB) from address 101? As PDP-11 has 16 address bits does it have only 32K memory locations (16 bits each) or 64K memory locations (8 bits each)?
The PDP-11 could address 64kb of memory.
It handled data as words, each word being addressed at an even memory location.
So it depends on what your "data read instruction" is.
If you issue a
MOV instruction to move data from memory to a register, it would return a 16 bit word. A word instruction could only address even memory addresses.
If you issue a
MOVB instruction to move just a byte, the register would be sign-extended into the upper 8 bits of the word. A byte instruction could address odd or even memory addresses.
Many instructions exist with a form that operates on words and a form that operates on bytes. The byte form of the instruction would have the
B suffix. If the most significant bit of the opcode was 1, then it operated on bytes.
There is a quick reference guide to the PDP-11 instruction set here from Toronto University.
Remember that the PDP-11 is known as middle-endian. In that each word is little-endian - the low addressed byte is the LSB. That word must be aligned on an even memory address. When doing 32-bit arithmetic, which the PDP-11 could do, the word on the lower address word was the MSW - big-endian.