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I've recently designed and built a modern Z80 single board computer based on a Z80 IPC chip. It's general purpose, and though I did not design it for compatibility to Altairs, I decided that my first software project for it would be to try to get Altair 8K Basic up and running on it. I happened to find a vintage version 3.2 cassette for it for sale, and bought it - hoping it's still readable.

I have delved into the details of bootstrapping Basic, and how it initializes itself, I do see I'll have some fun adapting my console IO port and tape serial port addresses to it, but while looking over a disassembly of the code for 4k Basic on GitHub I came across the automatic memory sizing code optionally run at startup.

An now I come to my question. The code snip is this:

    LXI H,UnusedMemory  
FindMemTopLoop  INX H   
    MVI A,37h   
    MOV M,A 
    CMP M   
    JNZ DoneMemSize 
    DCR A   
    MOV M,A 
    CMP M   
    JZ FindMemTopLoop   
    JMP DoneMemSize 
L0DDE   LXI H,LINE_BUFFER   
    CALL LineNumberFromStr  
    ORA A   
    JNZ SyntaxError 
    XCHG    
    DCX H   
DoneMemSize DCX H   

Given an all RAM 64k system, doesn't this loop effectively wipe itself out of memory? It inits HL to the address just after the BASIC code, and forever increments HL writing the 2 pattern sequence into memory. It only stops if it hits non-existent memory or a ROM. So this is going to wrap and keep writing until the loop kills itself.

The question: Was the design of the Altair such that it was guaranteed that some amount of ROM was installed? Or did they assume it was physically not possible to stuff 64k of RAM into the box?

For the first version of my board, I'm running with 128k of NVRAM. I'll avoid just hitting enter at the memory size prompt.

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    That code strikes me as really dodgy, though not just because systems might actually have 64K of RAM. An equally problematic scenario would be a system that only partially decodes addresses. A system with a 16K bank and a 4K bank, for example, might enable the upper memory bank map for all addresses in the range 4000h to 7FFFh, while ignoring address bits A12 and A13 for that bank. This would be fine if code only uses addresses 0000h to 4FFFh, but break when used with memory-scanning code like that shown above.
    – supercat
    Apr 9 at 23:34
  • Good comment, @supercat, systems like the zx80 did this with xK blocks repeated periodically throughout the 64K address space.
    – paxdiablo
    Apr 10 at 0:29
  • A better version would also stop once the address wrapped around to zero, but that still wouldn't solve the partial-decode issue.
    – paxdiablo
    Apr 10 at 0:31
  • @paxdiablo yeah, partial decoding is a cost saver for systems with central (or at least staged) decoding. Not so on S100 as those systems, where every board had its own decoder, a basic necessity to avoid conflicts and allow multiple boards of the same type - having all memory on a single board was simply impossible early on. Same way as ISA cards on a PC always fully decode their address within the expansion range. He old difference of logical vs. geographical expansion design.
    – Raffzahn
    Apr 10 at 0:43
  • @paxdiablo that extra test might have been against their design philosophy. starting with the toggled in boot loader which was written in a strange way to make it as compact as possible, and through the rest of the code I've seen, the emphasis was apparently to pull out all the tricks to make the code small and fast.
    – scm
    Apr 10 at 1:33

1 Answer 1

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Given an all RAM 64k system, doesn't this loop effectively wipe itself out of memory?

Seems quite like it. As well visible here.

The question: Was the design of the Altair such that it was guaranteed that some amount of ROM was installed? Or did they assume it was physically not possible to stuff 64k of RAM into the box?

I'd say somewhat half way between those options.

  • With less than 64 KiB it's guaranteed that the loop will end as Altair RAM (and S100 in general) is always fully decoded, so the loop will detect addresses where there is no RAM.

  • While the Altair did (by default) not use any ROM, filling the address space with RAM would have been an extreme costly manner - somewhat around 5 grand (of 1975 money that is).

The largest RAM board offered in 1975 was a 4 KiB D-RAM 88-4MCD at 338 USD. Filling all 64 KiB would thus require 16 boards, except the basic Altair had only a 4 slot mother board, with one used by the CPU and one with an I/O board (one needs to read the BASIC somehow) it would need at least 4 additional motherboard expansions 88-EC (and lots of soldering) to fit all that RAM. Which constructs the next hurdle as only 3 would fit in the case, so another case 88-EBC at USD 485 was needed.

(Having 22 Slots by default and getting rid of the tedious front panel soldering were two of the most important improvements the IMSAI offered)

Add the basic Altair at 621 USD, at least and I/O card and a terminal (without no BASIC), and the machine is no longer a cheap hobbyist device but on par with professional systems of the time.

No to mention that anyone having that amount of money will not use a version cut down to work with just 4 KiB of RAM, or would he?

The later (1976) 8 KiB board would not change the situation much.

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  • Thanks for the answer. I see that by 1979 you could purchase a 64k single card for $775. that's about $3300 in today's dollars, so something a business might buy. Hopefully later versions of BASIC addressed the problem
    – scm
    Apr 10 at 1:29
  • @scm yes, by 1980 all in one boards packaging CPU and 64 KiB, an FDC and one or two serial onto a single S100 board became available. Quie useful to allow higher clock rates.
    – Raffzahn
    Apr 10 at 2:52

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