# How many gates does each chip in OCS have?

According to Wikipedia, the original Agnus has 21000 transistors. How many gates would this be? (assuming there's a straightforward way to convert between gates and transistors).

EDIT: Thanks everyone for the answer to the gate/transistor conversion. Wondering if anyone else knows the number of gates of Paula and Denise?

• There's no straightforward way to convert, the number of transistors a gate uses depends on the complexity of the gate. May 28 '17 at 18:40

The Amiga 1000 chips were fabricated in 5 micron depletion-mode NMOS (mostly passive pull-up transistors), not CMOS (complementary P and N channel transistors). So a typical low-speed 2 input passive NAND or NOR gate would have 3 transistors, not 4. However, a lot of the logic was done using chains of pre-charge evaluate dynamic logic, with different transistors gated during different clock phases. So, there is no straightforward conversion.

The count of 22k transistors for the Agnus also seems wrong, as the die size, transistor size, and fabrication technology of the Agnus was not very far from that of the MC68000, which was reported to have over 60k transistors.

Also, the original first Agnus chip was fabricated by Synertek (possible later revisions may have been done by MOS Technologies, after the Commodore purchase of Amiga technology).

• Thanks for the answer and welcome to SO Retrocomputing, Ronald! Jun 17 '17 at 4:41

There is a more or less straightforward way: according to the CMOS article, a typical 2-input Boolean gate is 4 transistors, and each additional input requires 2 more transistors; a state element (a typical flip-flop) is 12 transistors (a 3 gate equivalent). Therefore the total number of logic gates is about 5 thousand; but how many of them were used for Boolean operations, and how many for registers is hard to tell.

• The thing is that we don't know the average number of inputs to the gates, we don't know anything about the type of gates (if you have a PLA-style field, you have a lot less transistors compared to single gates), and there are ways to use transistors that are not really equivalent to logic gates. "The number of gates is some fraction of the number of transistors" is trivially true, but your "there's 4 transistors per gate on average" is just a wild guess. "Number of gates" is just not a meaningful number unless we have the schematic. May 29 '17 at 5:26
• Also, the Mostek guys REALLY had a fetish for dynamic logic, transfer gates etc ... these structures work can achieve a lot of gates with very few transistors, at the price of absolutely needing everything to be clocked constantly (that's why the bus interface on 65xx leaves such a hyperactive impression compared to /WE-/CS style buses... ;) ). May 29 '17 at 9:22
• The Agnus was NOT fabricated using CMOS technology. The original design and first Amiga chips were NOT done by MOS Technologies. (I should know, as my name is listed on the patents as co-inventor.) Jun 16 '17 at 16:41
• @hotpaw2 OK, so what's your estimate of the number of gates (assuming that the reported number of transistors is correct)? Even better, could you rewrite its functionality in Verilog, to synthesize it and to verify the accuracy of your estimate? Jun 16 '17 at 22:02