Got a question about how the 68000 addresses memory.
Wikipedia says:
The 68000 has a 24-bit external address bus and two byte-select signals "replaced" A0.
Here is an image of the chip's pins:
As Wikipedia says, A0 is not there. So instead, we've got D0 thru D15, so that the CPU can fetch or store 16 bits at a time.
So what are the "byte-select" signals mentioned in the Wikipedia quote for?
The byte select signals select the low byte or the high byte or both. The 68000 has instructions for reading or writing words (16 bits) and bytes. In the latter case, it needs to be able to tell the world which half of the databus it is reading or writing.
According to the 68000 user manual (table 3-1), when the process is reading or writing the data bus the LDS and UDS signals are used to tell the world which byte or bytes the processor is trying to read/write. This means that you can connect devices with 8 bit ports to the databus and not have spurious reads and writes to the wrong ports.
Also, it means the 68000 can write a single byte to memory. If you want to execute
mov.b d0,someAddress
you put the low byte of d0 on either the low byte or high byte of the databus depending on whether someAddress is even or odd respectively, but you don't want the memory to store the other byte of the databus as well. The byte select signals can stop it from doing that.
The signals are there so in byte addressing mode the 68000 can read and write individual bytes.
From memory UDS means that valid data is on bits 8..15 of the data bus and LDS means that valid data is on bits 0..7 of the data bus.
In contrast a 8086 family part calls LDS A0 and BHE for the other bits. In practice on an AT architecture machine this is a little different as the hardware can map 16 bit accesses into two 8 bit ones for compatibility with original PC hardware.
This is particularly important as the 68000 maps peripherals into memory. So you might not want to do a 16 bit read / write cycle.
When I get home with a bit of time and some datasheets I'll try and expand this a bit (particularly how the AT bus works) and make sure I have the UDS/LDS mapping to bits correct
/LDS/UDS pair would mirror those of A0-/BHE pair. 00 for word access, 01 for first-byte access, and 10 for second-byte access. It's not intuitive that the idle state for a pair called A0-/BHE pair should have A0 set, however, and the A0-/BHE naming wouldn't really make sense on a big-endian system.
As others have explained this pin allows the 68000 to select an individual byte to read/write rather than a 16 bit word. However, they haven't explained why it was designed this way.
The 68k was designed for a 16 bit bus, with 16 bit RAM and ROM and peripherals. Byte addressing is not used with such a system, the smallest addressing unit is a 16 bit word. If the 68k wants to read/write a byte it handles it internally, e.g. reading a word and discarding 8 bits.
This technique is problematic for 8 bit peripherals. A read operation can have consequences as some parts alter their state on a read, e.g. a FIFO, so having to read an unrelated register or do a read-modify-write cycle would make the 68000 incompatible with them. The solution was the byte select pin, which acts as an additional address pin for 8 bit devices on the bus.
