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In the late seventies, up through around 1981, the maximum access speed of off-the-shelf RAM chips was around 2.6 MHz.

Did the same speed limit apply to ROM chips of the same era? If not, what would their maximum access speed have been?

Edit: Specifically, I'm talking about the mask-programmed ROM chips that the microcomputers of the era used for their Basic interpreters.

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    SRAM or DRAM? MOS or bipolar? What size? The small bipolar ROM chips used in the mid-70's mainframes had a few nS access times, vastly faster. SRAMs with access times in the dozens of nS were also easily available.
    – hotpaw2
    Jul 18, 2017 at 17:01
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    @hotpaw2 The kind that were used by microcomputers of the day as main memory.
    – rwallace
    Jul 18, 2017 at 18:12
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    ROM was slow enough on PCs that it was a common performance improvement (starting in the late 80's?) to implement BIOS shadowing on PC motherboards. The BIOS would copy itself to RAM, write protect it and then swap the RAM in place of the BIOS. I think though in the early eighties ROM was fast enough and CPUs slow enough not to be an issue. I don't recall any 8-bit personal computers being slower when executing code from ROM than from RAM.
    – user722
    Jul 18, 2017 at 19:08
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    I would guess the major speedup from shadow copying the ROM->RAM would be in the databus width, since most ROMs would be 8 bit. The SBHE signal on the AT bus wasn't fast enough (at worst case timing) to allow decoding less that 128K chunks (this is from memory) as the lower address bits weren't available quickly enough (in the real world I never had a problem with decoding in smaller 16K chunks)
    – PeterI
    Jul 19, 2017 at 9:36
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    A little more about ROMs and shadow RAM, shadow RAM for speed was often motivated by the speed limits of the reprogrammable ROMS.
    – Joel Rees
    Jul 20, 2017 at 14:51

3 Answers 3

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A typical EPROM series of that period is the 27xx series. Today's DIL EEPROMs still use the same pin layout.

Access time varied with models.

Datasheets with exact dates are difficult to google systematically, but for example, an Intel 2764A-250 had a 250ns access time in 1983, while the 2764A-1 variant had a 180ns access time in1989.

So the ballpark is "a bit faster than DRAM, but not that much".

I would expect PROMs and ROMs to have similar access times, but I don't remember the chip serial numbers for them.

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    @WayneConrad Both static and dynamic, moving to dynamic toward 1983/4 as they became cheaper, easier to use, and faster.
    – Joel Rees
    Jul 20, 2017 at 14:54
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    The original Commodore PET, Sinclair ZX-80, Tandy TRS-80 Model 100, and Commodore VIC-20 had static RAM. The Apple II, later Commodore PETs, Atari 800, and Commodore 64 had dynamic RAM.
    – Tim Locke
    Jul 20, 2017 at 19:48
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    Just enough faster that a 4 byte (IIRC) sequence in the PC ROM was good enough to avoid video noise, but would fail in RAM. There was an alternative 1 byte shorter sequence that had to be used in RAM due to the slight delay it imposed (vs ROM)... Jul 21, 2017 at 16:15
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    250ns was not faster than RAM in 1983. The 4164 series of DRAM chips were launched in the late 70s with speed grades available down to 120ns. Home computers of the era may not have used the capability (which would have required a DRAM controller capable of recognizing when the next access was going to be within the same row as the last, require latches, comparators and a fast clock signal to sync to, which was beyond the level of sophistication of the typical home computer, which would be more likely to have a capacitor and a Schmitt trigger to sequence the RAS and CAS lines) but it was there.
    – Jules
    Jul 28, 2017 at 22:59
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    But even without using a proper DRAM controller, the cycle time for a 4164-120 is 220ns. So of course the home computers of the era didn't bother with using page mode: they were mostly using either a 6502/6510 (max clock speed 2MHz) or Z80A (4MHz, but doesn't expect response to its memory requests until 1.5 cycles after it issues them), so you could easily get away with using memory that only responded after 375ns or longer.
    – Jules
    Jul 28, 2017 at 23:05
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The premise of your question is flawed. Much faster RAM than 2.6MHz (which I believe you have picked as an approximation of a 375ns cycle time, which is a critical number as will be explained below) was available in 1981. It just wasn't used because there was no point.

The 4164 series of DRAM chips were launched in the late 70s with speed grades available down to 120ns.

Home computers of the era may not have used the capability. DRAM chips store data in a 2D grid in order to minimize address decoding logic. Basically, a row and a column are selected, and the bit stored at the intersection is active. To reduce pin count, the row and column address are provided separately, controlled by 2 lines, RAS (Row Address Select) and CAS (Column Address Select). To specify an address, you connect RAS to ground while the first half your address is on the pins, then CAS for the next half. Obviously this takes longer than just providing the address all at once, so if you are accessing two columns in the same row you don't need to change the row address again. This is called page mode.

Using page mode would have required a DRAM controller capable of recognizing when the next access was going to be within the same row as the last, and would thus require latches, comparators and a fast clock signal to sync to, which was beyond the level of sophistication of the typical home computer, which would be more likely to have a capacitor and a Schmitt trigger to sequence the RAS and CAS lines.

But even without using a proper DRAM controller, the cycle time for a 4164-120 is 220ns. So of course the home computers of the era didn't bother with using page mode: they were mostly using either a 6502/6510 (max clock speed 2MHz) or Z80A (4MHz, but doesn't expect response to its memory requests until 1.5 cycles after it issues them), so you could easily get away with using memory that only responded after 375ns or longer, which is 1.5 cycles of the Z80A bus, and therefore the fastest memory access time that would make any difference in a 1981 era home computer.

And that is why you have the erroneous belief that you couldn't get RAM faster than 2.6MHz – you could, but it wouldn't have helped because that's the fastest speed your processor would have used it at.

Edited to add - I've just discovered a wonderful resource that can help answer your original question. In the pre-Internet era, it was of course tricky to get hold of datasheets for random components in order to evaluate whether they might be useful, and so on, a problem which led to the production of books that contained useful selections of datasheets and application notes for common (and sometimes not-so-common) components, along with indices to help you find components that might perform the function you're looking for. Sometimes this was just one manufacturers data, but there were also publications that covered multiple manufacturers, including one called "IC Master". It happens that several editions of this publication have been scanned and are available on archive.org.

Unfortunately, I can't find the 1981 edition. But they have the 1979 edition and the 1983 edition, which should give you some idea of what was around in '81.

The 1979 edition shows that, as you might expect, larger ROMs were slower than smaller ones, so it depends how big your BASIC interpreter was. This page contains a summary of the available ROMs in that year. As you can see, for any size larger than about 2KB you will be using one of the MOSFET-based technologies (mostly NMOS, but some CMOS chips were available), which was somewhat slower than the larger and more energy-hungry TTL implementations. So for a 2KB ROM, you could get access times down to 100ns/10MHz (i.e. better than most reasonably-priced RAM chips of the era -- scroll a few pages back and you'll see than a 4Kbit DRAM could be as fast as 40ns if you were willing to pay for it, but most were in the 150-400ns range), but for a larger 16KB (as used in the ZX Spectrum, for example) you'd be looking at 450ns/2.2MHz.

By 1983, the situation had improved quite a bit. 4KB fast TTL ROMs were available, and the MOS-based parts had begun to catch up with TTL in speed, so you could by then get a 16KB ROM as fast as 200ns (5MHz), while DRAM speed was practically stationary (100ns was the fastest speed available for a 64Kbit DRAM in both years, although I imagine it would have been substantially cheaper in 1983...).

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  • Fabulous job of researching this. Jul 31, 2017 at 18:42
  • Exploiting page mode should not have been difficult for machines that put more than one video-fetch cycle between CPU cycles. If a page-mode cycle would take 2/3 as long as a random cycle, something like a C64 could have eliminated badlines and the need for a separate color RAM if the CPU got the bus for 3/8 of a cycle, and the video chip could fetch a pair of consecutive bytes during the other 5/8, with only a modest increase in the DRAM speed requirement. The video chip would need a couple of ~20x16 shift registers to reorder the data going to the display since each 4 cycles would...
    – supercat
    Mar 4, 2019 at 16:45
  • ...yield two scan lines' worth of content for two characters, but it would no longer need the 40x12 buffer to hold the data fetched from the last badline.
    – supercat
    Mar 4, 2019 at 16:47
  • To support the main point, when upgrading my Apple II in 1980, I used 160ns 4116, not because needed, but because the cheapest available at a local dealer.
    – Raffzahn
    Oct 18, 2019 at 15:29
  • The BBC Micro, released late in 1981, routinely operated its commodity DRAM at 4MHz, using half the cycles to service a 2MHz 6502, and the other half to service a video display which required 2MB/s peak bandwidth. This required presenting 8 million address halves (RAS or CAS) to the DRAM per second. It could also access ROM at full speed, these being ordinary 27-series EPROMs of the time.
    – Chromatix
    Oct 20, 2019 at 20:41
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A DEC VAX of the early 1980s used ROM to store its microcode, but on power-up transferred all that into SRAM (static RAM). SRAM was faster than either ROM or DRAM (dynamic RAM), but more expensive and power-wasteful.

It still is.

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    The Modcomp minicomputers (~1980) did this also. A toggle switch on the front panel loaded the bootstrap program from ROM into RAM. Jul 21, 2017 at 14:00
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    CMOS SRAM can be more power-efficient than typical ROM or DRAM designs. One could make ROM as power-efficient as SRAM but at a significant cost in area by having transistors that could drive the bus high or low. I think one could still use one transistor per bit, but it would be necessary to make both VDD and VSS available throughout the entire array.
    – supercat
    Jul 21, 2017 at 17:05
  • Very power efficient when not accessed - both back then and these days, SRAMs with a small battery attached are used as persistent storage. Jul 24, 2017 at 22:08
  • Many PCs into the 90s did this too (it was a common BIOS feature called "shadow RAM"). Didn't stop until the move to 32 bit systems meant the BIOS wasn't used for performance critical operations any more.
    – Jules
    Jul 28, 2017 at 22:48
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    Moving ROM code into processor memory space is NOT what I was referring to; it was moving ROM into the microprogram (which defines the instruction set), implemented in RAM chips outside the processor main memory space.
    – Whit3rd
    Jul 29, 2017 at 2:19

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