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From https://en.wikipedia.org/wiki/ZX_Spectrum_Contended_Memory

"Contended memory space, on the other hand, is shared between the ULA and the Z80 and the ULA has higher priority. Contended memory occupies addresses 0x4000..0x7FFF of the Z80 memory map. This is the first 16 KB of RAM in the 48 KB machine but the entire RAM of the 16 KB machine."

Okay, I can sort of understand that in a scenario where the 48K machine uses three banks of 16kbit RAM chips, so just one bank is shared.

But as I understand it, later versions of the 48K Spectrum used a single bank of 64kbit RAM chips (so actually 64K RAM of which 16K was unused). How is that consistent with the possibility of only 16K being contended?

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    Later versions of the Sinclair ZX Spectrum didn't use a single bank of RAM, but the Inves Spectrum computer, a redesign made by Investronica for the spanish market, did use a single bank of RAM, yet being able to manage contention without slowing down or stopping the CPU.
    – mcleod_ideafix
    Oct 22, 2020 at 21:37

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I can find no evidence that a single bank of RAM was used. Checking out the schematics for every issue of 48kb Spectrum, all that seems to happen is a switch from sixteen x1 chips to two x8 chips, at issue 6. But the low 16kb and the high 32kb remain physically distinct.

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  • Looks like you're right! breakintoprogram.co.uk/computers/zx-spectrum/hardware/ram confirms. Hmm, seems like that wouldn't have been good for the manufacturing cost in the long run.
    – rwallace
    Oct 8, 2017 at 13:04
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    Well, the next step in development, the Spectrum 128, had two seperate 64KiB banks. One with shared access, one without.
    – Raffzahn
    Oct 8, 2017 at 20:56
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    @rwallace - in the long run, the cost of the DRAM chips reduced far enough that the wastage was more along the lines of having to source less commonly available 16K chips than not using the full capability of the 64K ones.
    – Jules
    Oct 9, 2017 at 2:19
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The 64K chips in the Spectrum 48K are used to provide the difference between the 16K and 48K models, i.e. exactly half of each chip is in use. The 16K of memory from the base model is retained.

Interestingly, this design allowed Sinclair to use 64K chips that would otherwise be rejected as faulty, as they just had to configure an address line to avoid the faulty part of the chip. Presumably they got these chips cheap enough to account for what otherwise would be a waste of only using half of them. Later Spectrums used fully working chips, though, and aftermarket hacks were available that let you bank switch them.

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  • Does this mean that the 64K chip really is working as a 32K chip? Or is each chip only storing half a byte somehow?
    – Omar and Lorraine
    Dec 6, 2017 at 9:07
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    @Wilson just using half the address space; at the time most DRAMs stored only 1 bit per address, you just wired them up in parallel until you got to your bus size. So eight of them for a Spectrum. Per faqwiki.zxnet.co.uk/wiki/DRAMS the Spectrum didn't start using wider RAM chips until the Amstrad models, when 'x4' (i.e. 4 bits per address) chips were used. Check out how the 4464 at the bottom has DQ1–4, four data lines, whereas everything else has only Din, a single data line. This was one of the factors that made 16-bit machines much more expensive way back when.
    – Tommy
    Dec 6, 2017 at 14:48
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Contention, especially memory contention in the ZX Spectrum, has nothing to do with the memory chips, but rather with the address that is placed in the address bus.

The method by which the ULA is granted prioritary access to memory is implemented by making the ULA generate the Z80 clock. When the ULA finds an address in the 4000h-7FFFh range in the bus, it can stop the clock signal, effectively stopping the Z80.

I'd recommend paying a visit to Chris Smith's excellent blog: http://www.zxdesign.info/harlequin.shtml or reading his book. :)

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    I'm not sure that it technically has nothing to do with the memory chips; they have no knowledge of it but it is a mechanism that the ULA puts into place because of their constraints. It's to ensure that only one device tries to access each bank of chips at a time, given that those chips can service only a single device at a time.
    – Tommy
    Dec 6, 2017 at 14:40
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No original speccies used a SINGLE bank of 64k DRAM chips. 128k, +2 and +3 used TWO banks of 64k chips, having in total 128 kbytes. Many russian speccy clones used single bank of 64k chips, one early example is Leningrad.

Interestingly enough, the memory in the Leningrad works at 3.5 MHz (access cycles frequency), i.e. faster than in original speccies, however still the whole RAM memory is contended, although not as badly as in original speccy. The contention might be described as 'every Z80 command aligns to the even number of cycles', while it is not completely true (not true for commands like DD CB xx opcode), still gives fair understanding of the contention.

Later, simple modifications within 3.5MHz access rate framework led to the wholly non-contended designs, like Pentagon, Scorpion (only later models, as the first models inherited contended design from Leningrad) and Kay.

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There was one Spectrum that had two 64K x 4 bit memory chips, but wasn't from Sinclair. It was the Inves Spectrum+, a clone manufactured in Spain. It had no contention, and the trick to achieve it was to make the ULA to do one read per clock cycle, and read the same data twice. Since the Z80 reads, at most, one byte per three clocks, this guarantees that the ULA can read the two bytes that it needs for each screen block.

Here you have a more detailed explanation (in spanish, sorry) http://www.zxprojects.com/inves/

Also, here is the author of that article explaining it in english A different way to share the memory bus between the CPU and the Video

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