In a Zilog ad from 1976 comparing the Z80 and Intel 8080, the following table is presented:

Table comparing the Z80 and the 8080, showing each processor's number of "instructions" and "OP codes"

What is the difference here between "Instructions" and "OP Codes"? In my experience, the two terms are either used interchangeably to refer to a particular machine language command understood by a processor, or else "instruction" is used to mean a particular instance of an opcode along with its operands. But obviously whoever prepared the table for this ad is making a different distinction between the two terms. Maybe they meant something different back then?

  • 10
    number of opcodes is simply the permutated instructions and registers (possibly addressing modes as well) - LD A,B and LD A,C are one instruction, but two opcodes. – tofro Dec 29 '17 at 10:56
up vote 25 down vote accepted

The definition of "instruction" and "OP code" (aka operation code) is a bit fuzzy because it depends on how humans view the CPU. So the designers and their marketing department mostly get to pick the numbers.

Operation code is the easier of the two: it is the number of different valid instruction byte sequences, excluding those parts of the instruction that encode constants. So in the advert given, they are counting the basic single-byte opcodes, plus those double-byte Z80 opcodes with ED, DD, etc prefixes. The Z80 does not commingle constants with its instructions, so there is a simple and obvious mapping of opcodes to bytes.

Instruction would be the number of conceptually different operations that the CPU makes. For example, you care more that the machine can add, divide, branch, read an I/O device, clear interrupts, etc, and less about the registers used to perform the task. This is much more wooly because instructions can be used in surprising ways: is xoring a register with itself an xor or a clear instruction? So in practice it is the number of assembler mnemonics.

However, the number of assembler mnemonics are not an innate property of a CPU. While the manufacturer will normally specify an assembly language, it is possible to invent a new assembly language that compiles down to the same opcodes. Consider the 6502: There is the LDA mnemonic which loads the A register from memory, and covers a number of different opcodes for the different addressing modes. But then there's the TXA mnemonic and loads the A register from the X register and has a single opcode. A third party assembler could choose to treat that as just another LDA form such as "LDA X", or even decide that LDA/TXA etc are just generalised move instructions and could be written "LD xxx, A", "LD X, A" etc.

Counting the number of instructions does make sense in the specific case of comparing the Z80 versus early Intel CPUs: the two instruction sets were quite similar. It is possible to mechanically translate the Intel assember source into Z80 code, so comparing them makes sense. A similar chart comparing ARM versus x86 would be meaningless.

  • Even on x86 there would be some ambiguity since "XCHG AX,AX" is a valid instruction, but "NOP" is documented as an instruction which has the same opcode and effect. – supercat Dec 30 '17 at 4:54
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    Arguably, the bit numbers in SET and similar commands can be considered constants commingled with instructions. Or did you mean something different by the phrase? That said, bit numbers aren't that different from register numbers, also encoded into three bits of the opcode... – Toby Speight May 30 at 9:24

What is the difference here between "Instructions" and "OP Codes"?

Instruction: A directive for a certain action, like ADD, SUB or MOV as a whole.

OP-Code: The Encoding of an instruction as seen by the CPU.

For example, the Z80 has 1 ADD instruction and 20 ADD op-codes.

In my experience, the two terms are either used interchangeably to refer to a particular machine language command understood by a processor

Not really. An instruction refers to a Assembler mnemonic, which again may have several opcodes. Op-code in contrast always and only refers to the first byte/word (usually) in object code. Then again, when looking at code, instruction also may describe the whole works.

Everything else is lazy usage.

or else "instruction" is used to mean a particular instance of an opcode along with its operands.

It's the other way around. Well, at least with CPUs like a most old 8 bit are, where the op-code inherently encoded what operands are used and how they are encoded.

As usual there are three variations between instruction and opcode possible, depending on the instruction structure:

  • The op-code (word) defines a certain operation, its workings, components and encoding. 6502 or Z80 opcodes are a good example.
  • The op-code defines operation, workings, and component range, but used components are encoded in separate elements (bytes/words). Example IBM/370
  • The op-code defines operation and workings, components and encoding is told in a follow up. x86 works much that way

And as usual, in real life these definitions can get mixed up - like with the 8086 having the operand size encoded within the op-code, but the operants used and their encoding denoted in a following (ModRM) byte.

Or to make it even more confusing, on the assembler side the 6502 has different mnemonics depending on the registers involved, but not for the addressing. So where a Z80 alike assembler line would be MOV A,X it needs TXA (*1).

But obviously whoever prepared the table for this ad is making a different distinction between the two terms.

It simply shows that there are a certain number of things the CPU can do with an even higher degree of variation. After all, advertisement with numbers is nothing but a pissing contest.

Maybe they meant something different back then?

Nope. Meaning did never change, just today, with less direct contact with the lower levels, people tend to use these terms in a less accurate, lazy way.


*1 - Before you ask, the reason was (as with the 6800) to simplify the assembler as much as possible. With register named in the mnemonic the only one operand was left (if at all) and that was always a memory operand.

  • Yeah... but why would that mean there are a different number of each? – wizzwizz4 Dec 29 '17 at 10:44
  • Are you saying that an instruction is an assembly mnemonic, which maps to different numeric opcodes depending on the types (addressing modes) of operands? – Psychonaut Dec 29 '17 at 10:54
  • The same instruction (verb word) can have multiple encodings, for example MOV R,A has a different encoding entirely to MOV A,B, not just a register field in the byte specifying which register to use. I can't believe there are 158 of them though I haven't counted. Opcodes is presumably the number of officially defined byte sequences, including those with prefixes but ignoring inline constants and redundant prefixes. Both meaningless numbers but that's marketing for you. – user3570736 Dec 29 '17 at 10:55
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    @wizzwizz4 'cause LD is an instruction, but LD D,imm and LD DE,imm are two op-codes. – Raffzahn Dec 29 '17 at 11:17
  • @Psychonaut yes, or better, it depends on the CPU you're looking at. For a 6502 yes. For a Z80 it also defines the parameters, not just the addressing. – Raffzahn Dec 29 '17 at 11:18

In Z80 assembly language the code looks like this:

add a,5

Where add is instruction and a,5 are the operands. You can have many permutations of the same instruction (with different operands) each of which has separate op.code. For example:

add a,b
add a,c
add a,d

all are still the "same" instruction add but with different operands and also op.codes (opc [hex]).

opc      T0 T1 MC1   MC2   MC3   MC4   MC5   MC6   MC7   mnemonic

80       04 00 M1R 4 ... 0 ... 0 ... 0 ... 0 ... 0 ... 0 ADD A,B
81       04 00 M1R 4 ... 0 ... 0 ... 0 ... 0 ... 0 ... 0 ADD A,C
82       04 00 M1R 4 ... 0 ... 0 ... 0 ... 0 ... 0 ... 0 ADD A,D

PS that comparison table was not accurate as there is much more op.codes for Z80 (which where discovered later on). My 100% Zexall passable emulation got 1792 op.codes (some of them do the same thing however) opposing to yours 696. The opc size can wary a lot for example it got even 3+1 byte opcs like:

opc      T0 T1 MC1   MC2   MC3   MC4   MC5   MC6   MC7   mnemonic

FDCBS2FF 23 00 M1R 4 M1R 4 MRD 3 MRD 5 MRD 4 MWR 3 ... 0 SET 7,(IY+S8),A

The number of instructions depend on what is considered as different instruction. Usually different type of operand count as different instruction.

For more info and my complete list of op.codes see:

Well, they are definitely cheating here since they state 158 instructions "including all of the [78] 8080A's instructions". The problem being that the Z80 (fortunately) combines a number of different 8080A instructions into single instructions.

Zilog has ADD where Intel has ADD and DAD, EX where Intel has HTHL and XCHG, LD where Intel has LXI and MOV (and likely others), JP where Intel has JPE, JPO, JP, JMP, JM... and so on.

I mean, that reduction in instructions is a real help, but here they go and only count the non-Intel instructions and add them to the Intel ones.

Or maybe they use the (upwards compatible) TDL assembly instructions? No idea.

  • 1
    Isn't mapping groups of opcodes to instruction mnemonics more about how the assembler writer and the documentation writer see it than about hardware? – rackandboneman Jan 2 at 13:37

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