mainly I'm trying to dispute the claim that computers have been vulnerable to Meltdown since 1995.
The claim was never that all computers since 1995 were vulnerable, just some. Also not that all PPro-using computers were vulnerable (as a whole system), but just that those CPUs were vulnerable.
Microsoft was not the only OS vendor for Pentium Pro CPUs in 1995, there were x86 OSes that did full memory protection.
Update: It turns out PPro / PII is not strictly vulnerable to Meltdown, instead leaking various microachitectural data but not cache/mem contents. Henry Wong ran some detailed tests of forbidden loads that were present or not in L1d cache (and various cases of TLB state) on a range of microarchitectures from P5 to Haswell, and Atom, K6, K8, Bulldozer, and Via. With results in an interesting table. The Microarchitecture Behind Meltdown
P4 Prescott is vulnerable, as are Core 2 and later Intel. (He didn't test PIII, Pentium M, or Core Solo so we don't know if Core2 is the first vulnerable uarch.) The AMD and Via uarches aren't vulnerable.
Pentium Pro, Pentium II
The Pentium Pro takes the “load value is a don’t-care” quite literally. For all of the forbidden loads, the
load unit completes and produces a value, and that value appears to be
various values taken from various parts of the processor. The value
varies and can be non-deterministic. None of the returned values
appear to be the memory data, so the Pentium Pro does not appear to be
vulnerable to Meltdown. The recognizable values include the PTE for
the load (which, at least in recent years, is itself considered
privileged information), the 12th-most-recent stored value (the store
queue has 12 entries), and rarely, a segment descriptor from
The Pentium II (Klamath) has the same behaviour as the Pentium Pro.
So it's not Meltdown; instead it's more like the general RIDL (Rogue In-flight Data Load) vulnerability, and other MDS (Microarchitectural Data Sampling). e.g. you might possibly be able to get some data the kernel stored before returning to user-space.
(The other not-vulnerable uarches, AMD, VIA, and Intel Atom, either don't produce a value at all, or produce zero. So there's no microarchitectural data leakage there.)
(The rest of this was written assuming the statement about PPro meltdown vulnerability was true. Systems existed in 1995 that used x86 memory protection, and PPro wasn't widely used in Win95 boxes until later PII / PIII.)
Linux in 1995 (when PPro was released) had many real users and full working memory protection between separate userspace processes. So did other Unix implementations on 386, like 386BSD, and some non-free Unix implementations for 386 which predated Linux.
Microsoft's crufty Win9x OS family being widely used at the time meant that most people didn't have an OS with full privilege separation for multiple users (or unprivileged processes), or to protect the kernel from applications. Win9x used virtual memory to stop processes from accidentally crashing each other, not for security. See Ross's answer, and another question: Even Win9x did run processes in separate address spaces from each other, but its security model allowed any process to load a driver (VxD) and bypass that.
Also note that Pentium Pro was not widely used in home computers. Pentium II in May 1997 was what really replaced Pentium MMX. Even the consumer-targeted PII was expensive at first: My first PC (in early 1998, IIRC) was a P-MMX running Linux.
The workstations / servers that used PPro were probably mostly not running Win9x. Some were probably running Linux or other Unix, many probably running Windows NT as mentioned in comments.
The claim that Intel CPUs dating back to 1995 were vulnerable to Meltdown is based on the fact that all of Intel's out-of-order CPUs (other than Pentium 4 (netburst microarchitecture)) can trace their lineage back to the first generation of P6 (Pentium Pro), and use the same fault-handling strategy for under-privileged TLB hits on kernel-only mappings: let the load continue microarchitecturally, and only flag it to fault on retirement, after potentially making other changes to micro-architectural state that depend on the loaded "secret" data, specifically the cache. This is the Meltdown design flaw.
(But it turns out that there have been changes over the years, and first-gen P6-family didn't expose cache contents. The above reasoning for the claim made sense, but turned out to be wrong.)
Sandybridge-family is a new microarchitecture family, but it did evolve from P6-family (Nehalem being the last generation). SnB incorporates some ideas from Netburst, but in a different form. (E.g. the decoded-uop cache instead of the trace cache.)
Most Intel-based computers in 1995 were either using in-order CPUs, and/or running OSes that didn't try to enforce process isolation. Some old 586 and 486 CPUs stayed in service for many years... (But since some software at the time had a security model that's defeated by Meltdown, it makes sense to say computer, not just CPU.)