I'm curious if this port is capable of anything more than 256KB
No, as @Tommy already pointed out, it's just a DRAM interface and not usable for anything else.
and if so was there ever a card produced as such?
Not that I ever heared of.
Going beyond that, was this port usable for anything other than RAM expansion?
As usual, every interface could be 'reused' by throwing 'enough' hardware at the issue. Not that it would make any sense with the A1000, given that a more traditional and better usable expansion port was also available.
Why only RAM?
Why an adding such an restricted interface not good for anything beside adding a limited mmount of RAM?
It's save to assume that it was to drive down cost (of the base unit) in combination with absence of imagination. Especially when considering that the original design for the A1000 called for 256 KiB of (Kickstart) ROM and only 128 KiB RAM in the base unit. The story goes that the design team did fight hard for a larger memory with 512 KiB as target. So 256 KiB in base unit plus a cheap (PCB) connector and a plasic cap instead of full 512 KiB looks quite like the typical compromise with management (*1).
Why so complicated?
Sure, 8 simple sockets on the mainboard have been a way better solution, but then again customers could have just went ahead and bought 8 cheap chips instead of a precious RAMEX board (*2).
It's basicly a 4164/4464 (*3) type chip interface for 4 blocks of 8 or 2 ICs each.
DRA0..7 provides a multiplexed 16 bit address where
/RAS signals an 8 bit row address and
/CASxy signals the lower 8 bit column address where
Due activation of either
/CASxy line or lines, one or more blocks are accessed.
All data lines of chips selecetd with
/CASLy are connected to D00..D07, while the ones with
/CASUy are connected to D08..D15.
Sounds complicated, but is rather simple:
For 16Bit access simultanius use of
/CASL0 + /CASU0 selects the lower (first) 128 KiB
/CASL1 + /CASU1 selects the higher (second) 128 KiB
For 8Bit access use of
/CASL0 selects the lower byte of the lower (first) 128 KiB
/CASU0 selects the upper byte of the lower (first) 128 KiB
/CASL1 selects the lower byte of the higher (second) 128 KiB
/CASU1 selects the upper byte of the higher (second) 128 KiB
*1 - I bet the expectation of selling a cheap to produce 256 KiB with good profit expansions did add apeal to Commodore management :))
*2 - see *1
*3 - Yes, it's not only technical feasible to use 4164s, but even has been done. I own an early prototype card using 4164s.